Semiconductor devices, FinFET devices, and manufacturing methods thereof

Patent metadata

Field	Value
Publication number	US-10049938-B2
Application number	US-201514599246-A
Country	US
Kind code	B2
Filing date	Jan 16, 2015
Priority date	Apr 21, 2014
Publication date	Aug 14, 2018
Grant date	Aug 14, 2018

Abstract

Semiconductor devices, fin field effect transistor (FinFET) devices, and methods of manufacturing semiconductor devices are disclosed. In some embodiments, a semiconductor device includes a substrate comprising a first fin and a second fin. A first epitaxial fin is disposed over the first fin, and a second epitaxial fin is disposed over the second fin. The second fin is proximate the first fin. The first epitaxial fin and the second epitaxial fin have an upper portion with a substantially pillar shape.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, the method comprising:
forming a plurality of fins in a substrate;
forming isolation regions between the plurality of fins;
recessing the plurality of fins;
epitaxially growing a material over each of the plurality of fins to form a plurality of first epitaxial fins;
recessing a top portion of the isolation regions to expose the plurality of first epitaxial fins;
forming a first sacrificial material over the plurality of first epitaxial fins and the isolation regions;
patterning the first sacrificial material to leave portions of the first sacrificial material disposed over first portions of the plurality of first epitaxial fins;
forming a spacer layer over the first sacrificial material, second portions of the plurality of first epitaxial fins, and the isolation regions;
etching the spacer layer to leave gate spacers disposed on sidewalls of the portions of the first sacrificial material and to leave barrier portions of the spacer layer disposed on sidewalls of the plurality of first epitaxial fins;
forming a second sacrificial material over top surfaces of the portions of the first sacrificial material, top surfaces of the plurality of first epitaxial fins, top surfaces of the isolation regions, and top surfaces and sidewalls of the gate spacers and the barrier portions of the spacer layer;
etching the second sacrificial material to leave portions of the second sacrificial material on sidewalls of the gate spacers and the barrier portions of the spacer layer on sidewalls of the plurality of first epitaxial fins;
selectively etching the plurality of first epitaxial fins to form recesses while retaining the second sacrificial material and the barrier portions of the spacer layer in a cross-section view of a source/drain region;
after selectively etching the plurality of first epitaxial fins, forming barrier portion residues by selectively removing upper portions of the barrier portions of the spacer layer while retaining the second sacrificial material, the barrier portion residues disposed on opposing sides of the source/drain region;
epitaxially growing a semiconductive material in the recesses to form a plurality of second epitaxial fins, the plurality of second epitaxial fins disposed over the plurality of fins; and
after growing the semiconductive material, removing the second sacrificial material.

2. The method according to claim 1 , wherein forming the first sacrificial material comprises forming a dummy dielectric layer, forming a dummy gate layer over the dummy dielectric layer, and forming a mask layer over the dummy gate layer.

3. The method according to claim 1 , wherein forming the spacer layer comprises forming a material selected from the group consisting essentially of silicon nitride (SiN), silicon carbon-nitride (SiCN), silicon carbon-oxynitride (SiCON), and combinations thereof.

4. The method according to claim 3 , wherein forming the spacer layer comprises forming a bi-layer of two different materials.

5. The method according to claim 1 , wherein etching the spacer layer or etching the second sacrificial material comprises an anisotropic etch process.

6. The method according to claim 1 , wherein forming the second sacrificial material comprises forming a conformal material selected from the group consisting of silicon dioxide (SiO 2 ), an oxide doped with phosphorous, an oxide doped with boron, and combinations thereof.

7. The method according to claim 1 , wherein epitaxially growing the material comprises forming portions of source regions and drain regions of a fin field effect transistor (FinFET) device, wherein a first one of the plurality of fins and a first one of the plurality of second epitaxial fins comprises the source region, wherein a second one of the plurality of fins and a second one of the plurality of second epitaxial fins comprises the drain region, and wherein the method further comprises:
removing the first sacrificial material;
forming a gate dielectric and a gate material in regions where the first sacrificial material was removed from; and
forming a contact material over the gate material, the source region, and the drain region.

8. The method according to claim 7 , further comprising forming a cap layer over the source region and the drain region and amorphizing a surface of the cap layer, before forming the contact material; and annealing the semiconductor device to form a silicide or germanide material between the cap layer and the contact material, after forming the contact material.

9. The method of claim 1 , wherein each of the barrier portion residues have a tapered shape that tapers in a direction toward a laterally adjacent region disposed over a respective fin of the plurality of fins.

10. A method of manufacturing a semiconductor device, the method comprising:
forming a first fin and a second fin over a substrate;
forming an isolation region between the first fin and the second fin;
recessing the first fin and the second fin;
growing a first epitaxial fin over the first fin, the first epitaxial fin comprising a first upper portion;
growing a second epitaxial fin over the second fin, the second epitaxial fin comprising a second upper portion;
recessing a top portion of the isolation region to expose the first epitaxial fin and the second epitaxial fin;
forming a first sacrificial material over the first epitaxial fin, the second epitaxial fin, and the isolation region;
patterning the first sacrificial material to leave portions of the first sacrificial material disposed over first portions of the first epitaxial fin and the second epitaxial fin;
forming a spacer layer over the first sacrificial material, second portions of the first epitaxial fin and the second epitaxial fin, and the isolation region;
etching the spacer layer to form a gate spacer disposed on sidewalls of the portions of the first sacrificial material, and to leave barrier portions of the spacer layer on sidewalls of the first epitaxial fin and the second epitaxial fin;
forming a second sacrificial material over top surfaces of the portions of the first sacrificial material, top surfaces of the first epitaxial fin and the second epitaxial fin, top surfaces of the isolation region, and top surfaces and sidewalls of the gate spacer and the barrier portions of the spacer layer;
etching the second sacrificial material to leave portions of the second sacrificial material on sidewalls of the gate spacer and the barrier portions of the spacer layer on sidewalls of the first epitaxial fin and the second epitaxial fin in cross-sectional views of respective source/drain regions;
selectively removing the first upper portion of the first epitaxial fin and the second upper portion of the second epitaxial fin to form a first recess and a second recess, respectively, while retaining the second sacrificial material and the barrier portions of the spacer layer;
after selectively removing the first upper portion and the second upper portion, forming barrier portion residues by selectively removing upper portions of the barrier portions of the spacer layer while retaining the second sacrificial material, wherein the barrier portion residues are disposed on opposing sides of the respective source/drain regions;
epitaxially growing a semiconductive material in the first recess and the second recess to form a third epitaxial fin and a fourth epitaxial fin, respectively, wherein the third epitaxial fin is disposed over the first fin, and the fourth epitaxial fin is disposed over the second fin; and
after epitaxially growing the semiconductive material, removing the second sacrificial material.

Assignees

• Taiwan Semiconductor Mfg Co Ltd
• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Wang Sung-Li
• Chang Chih-Sheng
• Sun Sey-Ping

Classifications

• H01L29/66545

  Electricity · mapped topic

• H01L21/823481

  Electricity · mapped topic

• H01L29/1608

  Electricity · mapped topic

• H01L29/0653

  Electricity · mapped topic

• H01L29/161

  Electricity · mapped topic