Light emitting diode and fabrication method thereof

US10043944B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10043944-B2
Application numberUS-201715847844-A
CountryUS
Kind codeB2
Filing dateDec 19, 2017
Priority dateNov 2, 2015
Publication dateAug 7, 2018
Grant dateAug 7, 2018

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Abstract

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A light-emitting diode (LED) epitaxial structure includes, from bottom to up, a substrate, a first conductive type semiconductor layer, a super lattice, a multi-quantum well layer with V pits, a hole injection layer and a second conductive type semiconductor layer. The hole injection layer appears in the shape of dual hexagonal pyramid, which fills up the V pits and embeds in the second conductive type semiconductor layer. Various embodiments of the present disclosures can effectively reduce point defect density and dislocation density of semiconductor material and effectively enlarge hole injection area and improves hole injection efficiency.

First claim

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The invention claimed is: 1. A light-emitting diode, comprising: a first conductive type semiconductor layer; a super lattice; a multi-quantum well layer with V pits; a hole injection layer; and a second-conductive type semiconductor layer; wherein the hole injection layer appears in a dual hexagonal pyramid shape, which fills up the V pits and embeds in the second conductive type semiconductor layer. 2. The light-emitting diode of claim 1 , wherein, the hole injection layer material is In x Ga 1-x N (0<x≤1), wherein, x and y satisfy the relational expression 0<x<y≤1. 3. The light-emitting diode of claim 1 , wherein, the material of the multi-quantum well layer is In y Al z Ga 1-y-z N (0<y≤1, 0≤z≤1, 0<y+z≤1), wherein, x and y satisfy the relational expression 0<x<y≤1. 4. The light-emitting diode of claim 1 , wherein, the absorption wavelength of the hole injection layer is shorter than the light-emitting wavelength of the multi-quantum well layer. 5. The light-emitting diode of claim 1 , wherein, the first conductive type semiconductor layer comprises an N—GaN layer, or comprises a U—GaN layer and an N—GaN layer. 6. The light-emitting diode of claim 1 , wherein, the second conductive type semiconductor layer comprises a P—GaN layer, or comprises an electronic blocking layer and a P—GaN layer, or comprises an electronic blocking layer, a P—GaN layer and a contact layer. 7. A fabrication method of a light-emitting diode, comprising: (1) growing a first conductive type semiconductor layer; (2) growing a super lattice over the first conductive type semiconductor layer; (3) growing a multi-quantum well layer with V pits over the super lattice; (4) growing a hole injection layer in the V pits, which fills up and is higher than the V pits, until a hole injection layer of dual hexagonal pyramid shape is formed; (5) growing a second conductive type semiconductor layer over the top surface of the multi-quantum well layer and the hole injection layer. 8. The fabrication method of claim 7 , wherein, also comprises growing an electronic blocking layer over the top surface of the multi-quantum well layer. 9. The fabrication method of claim 8 , wherein, also comprises, before step (5), forming a mask material layer on the top surface of the electronic blocking layer; growing a hole injection layer of dual hexagonal pyramid shape in the V pits; and removing the mask material layer. 10. The fabrication method of claim 7 , wherein, the absorption wavelength of the hole injection layer is shorter than the light-emitting wavelength of the multi-quantum well layer. 11. The fabrication method of claim 7 , wherein, the hole injection layer of dual hexagonal pyramid shape in step (4) is formed via 3D epitaxial growth in a H 2 -free environment with reaction pressure >400 tor, growth temperature of 750-850° C. and growth rate of 0.1-0.5 μm/h. 12. The fabrication method of claim 7 , further comprises, before step (5), forming a mask material layer on the top surface of the multi-quantum well layer; growing a hole injection layer of dual hexagonal pyramid shape in the V pits; and removing the mask material layer. 13. The fabrication method of claim 7 , wherein, the mask material layer is formed via coating deposition in small angle (≤15°) to avoid formation in the V pits. 14. A light-emitting system comprising a plurality of light-emitting diodes, wherein each light-emitting diode comprises, from bottom to up: a first conductive type semiconductor layer; a super lattice; a multi-quantum well layer with V pits; a hole injection layer; and a second-conductive type semiconductor layer; wherein the hole injection layer appears in a dual hexagonal pyramid shape, which fills up the V pits and embeds in the second conductive type semiconductor layer. 15. The light-emitting system of claim 14 , wherein, the hole injection layer material is In x Ga 1-x N (0<x≤1), wherein, x and y satisfy the relational expression 0<x<y≤1. 16. The light-emitting system of claim 14 , wherein, the material of the multi-quantum well layer is In y Al z Ga 1-y-z N (0<y≤1, 0≤z≤1, 0<y+z≤1), wherein, x and y satisfy the relational expression 0<x<y≤1. 17. The light-emitting system of claim 14 , wherein, the absorption wavelength of the hole injection layer is shorter than the light-emitting wavelength of the multi-quantum well layer. 18. The light-emitting system of claim 14 , wherein, the first conductive type semiconductor layer comprises an N—GaN layer, or comprises a U—GaN layer and an N—GaN layer. 19. The light-emitting system of claim 14 , wherein, the second conductive type semiconductor layer comprises a P—GaN layer, or comprises an electronic blocking layer and a P—GaN layer, or comprises an electronic blocking layer, a P—GaN layer and a contact layer.

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What does patent US10043944B2 cover?
A light-emitting diode (LED) epitaxial structure includes, from bottom to up, a substrate, a first conductive type semiconductor layer, a super lattice, a multi-quantum well layer with V pits, a hole injection layer and a second conductive type semiconductor layer. The hole injection layer appears in the shape of dual hexagonal pyramid, which fills up the V pits and embeds in the second conduct…
Who is the assignee on this patent?
Xiamen Sanan Optoelectronics Technology Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L33/14. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 07 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).