Semiconductor memory device
US-9018682-B2 · Apr 28, 2015 · US
Semiconductor device, systems and methods of manufacture
US10043816B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10043816-B2 |
| Application number | US-201414474867-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 2, 2014 |
| Priority date | Sep 2, 2013 |
| Publication date | Aug 7, 2018 |
| Grant date | Aug 7, 2018 |
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- Title
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Abstract
Official abstract text for this publication.
A semiconductor memory device includes a stack of word lines and insulating patterns. Cell pillars extend vertically through the stack of word lines and insulating patterns with memory cells being formed at the junctions of the cell pillars and the word lines. A ratio of the thickness of the word lines to the thickness of immediately neighboring insulating patterns is different at different locations along one or more of the cell pillars. Related methods of manufacturing and systems are also disclosed.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a substrate; a stack comprising a lower select line, a plurality of word lines and an upper select line stacked on the substrate in a vertical direction with respect to the substrate such that the plurality of word lines are interposed between the lower select line and the upper select line; a plurality of cell pillars, each of the plurality of cell pillars vertically extending through the stack of the lower select line…
Assignees
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Classifications
- H01L27/1157Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US10043816B2 cover?
- A semiconductor memory device includes a stack of word lines and insulating patterns. Cell pillars extend vertically through the stack of word lines and insulating patterns with memory cells being formed at the junctions of the cell pillars and the word lines. A ratio of the thickness of the word lines to the thickness of immediately neighboring insulating patterns is different at different loc…
- Who is the assignee on this patent?
- Taekyung Kim, Seol Kwang Soo, Cho Seong Soon, and 3 more
- What technology area does this patent fall under?
- Primary CPC classification H01L27/1157. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 07 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).