Electronic module comprising fluid cooling channel and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-10037972-B2
Application number	US-201615137062-A
Country	US
Kind code	B2
Filing date	Apr 25, 2016
Priority date	Apr 28, 2015
Publication date	Jul 31, 2018
Grant date	Jul 31, 2018

Abstract

Various embodiments provide an electronic module comprising a interposer comprising a fluid channel formed in an electrically isolating material and an electrically conductive structured layer; at least one electronic chip attached to the electrically conductive layer and in thermal contact to the fluid channel; and a molded encapsulation formed at least partially around the at least one electronic chip, wherein the electrically conductive structured layer is directly formed on the electrically isolating material.

First claim

What is claimed is:

1. An electronic module comprising:
an interposer comprising a fluid channel formed in an electrically isolating material and an electrically conductive structured layer;
at least one electronic chip attached to the electrically conductive layer and in thermal contact to the fluid channel; and
a molded encapsulation formed at least partially around the at least one electronic chip,
wherein the electrically conductive structured layer is directly formed on the electrically isolating material,
wherein the interposer comprises a ceramic material,
wherein the electrically conductive structured layer comprises a metal and is sintered together with the ceramic material.

2. The electronic module according to claim 1 , further comprising a further electronic chip, wherein the at least one electronic chip is arranged on a first main surface of the interposer and the further electronic chip is arranged on a second main surface of the interposer.

3. The electronic module according to claim 1 , wherein the at least one electronic chip is attached to the electrically conductive structure layer by a sintering process.

4. The electronic module according to claim 1 , further comprising an external electrical contact connected to the electrically conductive structured layer and being partially embedded into the molded encapsulation.

5. The electronic module according to claim 1 , wherein the electronic chip is connected to the electrically conductive structured layer by a bonding process selected out of the group consisting of:
wire bonding;
clip bonding;
laser welding;
soldering;
resistance welding; and
ultrasonic welding.

6. The electronic module according to claim 1 , wherein the molded encapsulation comprises surface structures configured to fix the electronic module to an external structure.

7. The electronic module according to claim 6 , wherein the surface structure has a form selected out of the group consisting of:
groove;
tongue;
screw hole;
rivet;
screw; and
recess.

8. The electronic module according to claim 1 , further comprising a fixation element embedded in the molded encapsulation.

9. The electronic module according to claim 1 , wherein the at least one electronic chip is one out of the group consisting of:
power transistor;
power diode; and
logic components.

10. The electronic module according to claim 1 , further comprising a passive electric component at least partially embedded in the molded encapsulation.

11. The electronic module according to claim 1 , wherein the electrically conductive structured layer comprising portions of different dimensions.

12. The electronic module according to claim 1 , wherein the encapsulation comprises an encapsulant and a filler material.

13. The electronic module according to claim 1 , further comprises a redistribution layer.

Assignees

• Infineon Technologies Ag

Inventors

• Fuergut Edward
• Gruber Martin
• Hable Wolfram

Classifications

• H10W90/764

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/288

  characterised by arrangements for thermal management of the stacked chips · CPC title

• H10W90/22

  the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL · CPC title