Circuit for and method of enabling the selection of a circuit

Patent metadata

Field	Value
Publication number	US-10033388-B1
Application number	US-201715465402-A
Country	US
Kind code	B1
Filing date	Mar 21, 2017
Priority date	Mar 21, 2017
Publication date	Jul 24, 2018
Grant date	Jul 24, 2018

Abstract

An integrated circuit enables the selection of a circuit. According to one implementation, a plurality of redundant circuits provide a predetermined function and a voltage sensor may be coupled to receive a reference voltage. A selection circuit may be coupled to the voltage sensor and the reference voltage, wherein the selection circuit selects one of the plurality of redundant circuits to be implemented in the integrated circuit based upon a detected voltage of the reference voltage of the reference voltage.

First claim

What is claimed is:

1. An integrated circuit enabling the selection of a circuit, the integrated circuit comprising:
a plurality of redundant circuits providing a predetermined function;
a voltage sensor coupled to receive a reference voltage; and
a selection circuit coupled to the voltage sensor and the reference voltage, wherein the selection circuit selects one of the plurality of redundant circuits to be implemented in the integrated circuit based upon a detected voltage of the reference voltage.

2. The integrated circuit of claim 1 wherein the plurality of redundant circuits comprises a first pair of redundant circuits and a second pair of redundant circuits, and the selection circuit enables routing of the reference voltage to a first redundant circuit or a second redundant circuit of the first pair of redundant circuits and a third redundant circuit or a fourth redundant circuit of the second pair of redundant circuits.

3. The integrated circuit of claim 1 wherein the selection circuit comprises a plurality of switches configured to control the selection of one of the plurality of redundant circuits to be implemented in the integrated circuit based upon a detected voltage.

4. The integrated circuit of claim 1 wherein the voltage sensor comprises a comparator, and an output of the comparator is coupled to a control terminal of the selection circuit.

5. The integrated circuit of claim 4 further comprising a bypass circuit coupled to receive a bypass signal, wherein the bypass circuit enables the selection of a default redundant circuit of the plurality of redundant circuits.

6. The integrated circuit of claim 1 wherein the selection circuit further comprises a clock control circuit for selecting a clock signal that is routed to the selected one of the plurality of redundant circuits.

7. The integrated circuit of claim 6 wherein the clock control circuit generates a first reference clock and a second reference clock.

8. The integrated circuit of claim 1 further comprising a plurality of voltage sensors coupled to receive the reference voltage, wherein each voltage sensor is configured to control a plurality of redundant circuits.

9. The integrated circuit of claim 8 wherein the plurality of voltage sensors are distributed over the integrated circuit.

10. The integrated circuit of claim 8 wherein a voltage sensor of the plurality of voltage sensors is associated with predetermined redundant circuits of the plurality of redundant circuits.

11. A method of enabling the selection of a circuit, the method comprising:
implementing a plurality of redundant circuits that provide a predetermined function;
receiving a reference voltage at a voltage sensor;
configuring a selection circuit to receive the reference voltage at an input and an output of the voltage sensor at a control terminal; and
selecting one of the plurality of redundant circuits to be implemented in the integrated circuit based upon a detected voltage of the reference voltage.

12. The method of claim 11 wherein implementing a plurality of redundant circuits comprises implementing a first pair of redundant circuits and a second pair of redundant circuits, and wherein enabling routing of the reference voltage to a first redundant circuit or a second redundant circuit of the first pair of redundant circuits and a third redundant circuit or a fourth redundant circuit of the second pair of redundant circuits.

13. The method of claim 11 further comprising configuring a plurality of switches to control the selection of one of the plurality of redundant circuits to be implemented in the integrated circuit based upon a detected voltage.

14. The method of claim 13 wherein receiving a reference voltage at a voltage sensor comprises receiving a reference voltage at a comparator circuit, and coupling an output of the comparator circuit to the control terminal of the selection circuit.

15. The method of claim 11 further comprising enabling the selection of a default redundant circuit of the plurality of redundant circuits using a bypass signal.

16. The method of claim 11 wherein implementing a plurality of redundant circuits comprises implementing a first redundant circuit adapted to operate using a first voltage and implementing a second redundant circuit adapted to operate using a second voltage.

17. The method of claim 11 further comprising generating a first reference clock and a second reference clock.

18. The method of claim 11 further comprising implementing a plurality of voltage sensors coupled to receive the reference voltage.

19. The method of claim 18 further comprising distributing the plurality of voltage sensors over the integrated circuit.

20. The method of claim 18 further comprising associating the plurality of voltage sensors with predetermined groups of redundant circuits of the plurality of redundant circuits.

Assignees

• Xilinx Inc

Inventors

• Rawat Mini
• Maillard Pierre
• Hart Michael J

Classifications

• G11C29/702

  by replacing auxiliary circuits, e.g. spare voltage generators, decoders or sense amplifiers, to be used instead of defective ones · CPC title

• G11C7/20

  Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory · CPC title

• H03K19/17784

  for supply voltage · CPC title

• G11C7/24

  Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells · CPC title

• H03K19/17728

  Reconfigurable logic blocks, e.g. lookup tables · CPC title