Semiconductor processing with DC assisted RF power for improved control

Patent metadata

Field	Value
Publication number	US-10032606-B2
Application number	US-201615187211-A
Country	US
Kind code	B2
Filing date	Jun 20, 2016
Priority date	Aug 2, 2012
Publication date	Jul 24, 2018
Grant date	Jul 24, 2018

Abstract

Semiconductor processing systems are described including a process chamber. The process chamber may include a lid assembly, grid electrode, conductive insert, and ground electrode. Each component may be coupled with one or more power supplies operable to produce a plasma within the process chamber. Each component may be electrically isolated through the positioning of a plurality of insulation members. The one or more power supplies may be electrically coupled with the process chamber with the use of switching mechanisms. The switches may be switchable to electrically couple the one or more power supplies to the components of the process chamber.

First claim

What is claimed is:

1. A semiconductor processing system comprising:
a processing chamber that includes:
a lid assembly defining a precursor inlet through which precursor species may be delivered;
a ground electrode;
a grid electrode disposed between the lid assembly and the ground electrode, and defining a first plasma region within the chamber between the grid electrode and the lid assembly and a second plasma region within the chamber between the grid electrode and the ground electrode;
a conductive insert disposed between the lid assembly and the grid electrode at a periphery of the first plasma region and at least partially defining a section of a sidewall of the processing chamber;
an insulation member positioned to electrically isolate the grid electrode from the conductive insert;

a first power supply electrically coupled with the lid assembly; and
a second power supply electrically coupled with at least one of the lid assembly, the grid electrode, or the conductive insert.

2. The semiconductor processing system of claim 1 , further comprising a first switch that is electrically coupled with the second power supply, and that is switchable to electrically couple the second power supply to one of the lid assembly, the grid electrode, or the conductive insert.

3. The semiconductor processing system of claim 1 , further comprising a second switch that is switchable to electrically couple at least two of the lid assembly, the ground electrode, or the grid electrode.

4. The semiconductor processing system of claim 3 , wherein the first switch is switched to electrically couple the second power supply with the conductive insert, and wherein the second switch is switched to electrically couple the grid electrode and the ground electrode.

5. The semiconductor processing system of claim 4 , wherein the second power supply is configured to deliver a negative voltage to the conductive insert, and wherein the first power supply is configured to ignite a plasma in the first plasma region where electron flux is directed to the grid electrode.

6. The semiconductor processing system of claim 4 , wherein the second power supply is configured to deliver a positive voltage to the conductive insert, and wherein the first power supply is configured to ignite a plasma in the first plasma region where ion flux is directed to the grid electrode.

7. The semiconductor processing system of claim 3 , wherein the first switch is switched to electrically couple the second power supply with the lid assembly such that both the first and second power supplies are electrically coupled with the lid assembly, and wherein the second switch is switched to electrically couple the grid electrode and the ground electrode.

8. The semiconductor processing system of claim 7 , wherein the second power supply is configured to provide constant voltage to the lid assembly, and the first power supply is configured to provide pulsed frequency power to the lid assembly.

9. The semiconductor processing system of claim 3 , wherein the first switch is switched to electrically couple the second power supply with the lid assembly such that both the first and second power supplies are electrically coupled with the lid assembly, and wherein the second switch is switched to electrically couple the grid electrode and the lid assembly.

10. The semiconductor processing system of claim 9 , wherein the second power supply is configured to provide constant voltage to the lid assembly, and the first power supply is configured to provide pulsed frequency power to the lid assembly.

11. The semiconductor processing system of claim 3 , wherein the first switch is switched to electrically couple the second power supply with the grid electrode.

12. The semiconductor processing system of claim 11 , wherein the second power supply is configured to provide constant voltage to the grid electrode, and the first power supply is configured to provide pulsed frequency power to the lid assembly.

13. The semiconductor processing system of claim 1 , wherein the first power supply is an RF power supply, and the second power supply is a DC power supply.

Assignees

• Applied Materials Inc

Inventors

• Yang Jang-Gyoo
• Chen Xinglong
• Park Soonam
• Baek Jonghoon
• Garg Saurabh
• Venkataraman Shankar

Classifications

• H10P50/287

  by chemical means · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/267

  using plasmas · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title

• H10P14/43

  Chemical deposition, e.g. chemical vapour deposition [CVD] · CPC title