Dielectric cladding of microelectromechanical systems (MEMS) elements for improved reliability

Patent metadata

Field	Value
Publication number	US-10029908-B1
Application number	US-201615395029-A
Country	US
Kind code	B1
Filing date	Dec 30, 2016
Priority date	Dec 30, 2016
Publication date	Jul 24, 2018
Grant date	Jul 24, 2018

Abstract

In described examples, a method of forming a microelectromechanical device comprises: forming a first metallic layer comprising a conducting layer on a substrate; forming a first dielectric layer on the first metallic layer, wherein the first dielectric layer comprises one or more individual dielectric layers; forming a sacrificial layer on the first dielectric layer; forming a second dielectric layer on the sacrificial layer; forming a second metallic layer on the second dielectric layer; and removing the sacrificial layer to form a spacing between the second dielectric layer and the first dielectric layer. Removing the sacrificial layer enables movement of the second dielectric layer relative to the first dielectric layer in at least one direction.

First claim

What is claimed is:

1. A method of forming a microelectromechanical device, the method comprising:
forming a first metallic layer comprising a conducting layer on a substrate;
forming a first via in the conducting layer;
forming a first dielectric layer on the first metallic layer, wherein the first dielectric layer comprises one or more individual dielectric layers;
forming a sacrificial layer on the first dielectric layer;
forming a second via in the sacrificial layer, wherein the second via extends to the first dielectric layer;
forming a second dielectric layer on the sacrificial layer;
forming a second metallic layer on the second dielectric layer;
and
removing the sacrificial layer to form a spacing between the second dielectric layer and the first dielectric layer, wherein removing the sacrificial layer enables movement of the second dielectric layer relative to the first dielectric layer about the second via.

2. The method of claim 1 , further comprising forming the first dielectric layer via atomic layer deposition (ALD) or plasma-enhanced chemical vapor deposition (PECVD), and forming the second dielectric layer via atomic layer deposition (ALD) or plasma-enhanced chemical vapor deposition (PECVD).

3. The method of claim 1 , further comprising forming the sacrificial layer using a photoresist on the first dielectric layer.

4. The method of claim 1 , wherein the first dielectric layer comprises a first layer of substoichiometric silicon nitride SiN x .

5. The method of claim 4 , wherein the first dielectric layer further comprises a second layer of Al 2 O 3 formed on the first layer of substoichiometric silicon nitride SiN x .

6. The method of claim 1 , wherein the second dielectric layer comprises Al2O3 and has a thickness from 1 Angstrom to 500 Angstroms.

7. The method of claim 1 , further comprising forming the sacrificial layer using a photoresist on the first dielectric layer, and removing the photoresist via etching using a plasma comprising fluorine.

8. The method of claim 1 , wherein the second metallic layer comprises an aluminum-titanium alloy.

9. The method of claim 1 , wherein the first metallic layer further comprises at least one barrier layer disposed on a first side of the conducting layer, on a second side of the conducting layer, or within the conducting layer.

10. The method of claim 1 , wherein the first metallic layer is formed without a barrier layer.

11. A microelectromechanical device, comprising:
a first metallic layer comprising a conducting layer formed on a substrate, wherein the first metallic layer includes a via extending to the substrate;
a first dielectric layer formed on the first metallic layer;
a second dielectric layer separated from the first dielectric layer by a void, such that at least a portion of the second dielectric layer is not in contact with a portion of the first dielectric layer; and
a second metallic layer formed on the dielectric layer, wherein the second metallic layer and the second dielectric layer include a second via that extends to the first dielectric layer, and wherein the void is configured to enable movement of the second dielectric layer and the second metallic layer relative to the first dielectric layer about the second via.

12. The device of claim 11 , wherein the first dielectric layer comprises substoichiometric silicon nitride SiN x and Al 2 O 3 , and the second metallic layer comprises an aluminum-titanium alloy.

13. The device of claim 11 , wherein the second dielectric layer comprises Al 2 O 3 and has a thickness from 1 Angstrom to 500 Angstroms.

Assignees

• Texas Instruments Inc

Inventors

• Jacobs Simon Joshua
• Sing Molly Nelis
• Taylor Kelly Jay

Classifications

• B81C1/00396

  Mask characterised by its composition, e.g. multilayer masks · CPC title

• B81B7/0025 Primary

  Protection against chemical alteration · CPC title

• B81B3/0005

  Anti-stiction coatings · CPC title

• B81C1/0038

  Processes for creating layers of materials not provided for in groups B81C1/00357 - B81C1/00373 · CPC title

• B81B7/02 Primary

  containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title