Amplifier system, controller of main amplifier and associated control method

US10027300B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10027300-B2
Application numberUS-201615241035-A
CountryUS
Kind codeB2
Filing dateAug 18, 2016
Priority dateNov 12, 2015
Publication dateJul 17, 2018
Grant dateJul 17, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention provides a control circuit to stabilize an output power of a power amplifier. The control circuit comprises a voltage clamping loop, a current clamping loop and a loop for reducing power variation under VSWR, where the voltage clamping loop is used to clamp an output voltage of the power amplifier within a defined voltage range, the current clamping loop is used to clamp a current of the power amplifier within a defined current range, and the loop for reducing power variation under VSWR is implemented by an impedance detector to compensate the output power under VSWR variation.

First claim

Opening claim text (preview).

What is claimed is: 1. An amplifier system, comprising: a main amplifier comprising a first transistor and a second transistor coupled in cascode, wherein the main amplifier receives an input signal and outputs an output signal; a controller, coupled to the main amplifier, for generating a control signal according to the output signal and a current of the main amplifier, to control a gain of the main amplifier; and a current clamp circuit, coupled to the main amplifier and the controller, for sensing the current of the main amplifier, and adjusting the control signal according to the sensed current, to clamp the current of the main amplifier within a defined current range. 2. The amplifier system of claim 1 , wherein the main amplifier amplifies the input signal at a gate electrode of the first transistor to generate the output signal at a drain electrode of the second transistor, and the controller generates the control signal to a gate electrode of the second transistor to control the gain of the main amplifier. 3. The amplifier system of claim 1 , further comprising: a voltage clamp circuit, coupled to the main amplifier and the controller, for detecting an amplitude of the output signal, and adjusting the control signal according to the amplitude of the output signal, to clamp the output signal within a defined voltage range. 4. The amplifier system of claim 3 , wherein the controller comprises: a first operational amplifier, for receiving a power indication signal and a feedback signal to generate the control signal; and the voltage clamp circuit comprises: a peak detector, for detecting the amplitude of the output signal; a second operational amplifier, for receiving the amplitude of the output signal and a reference voltage to generate a compensation signal; and a control transistor, coupled to an output node of the first operational amplifier, for adjusting the control signal according to the compensation signal. 5. The amplifier system of claim 1 , wherein the current clamp circuit senses the current of the main amplifier by using dummy devices. 6. The amplifier system of claim 1 , wherein the controller comprises: a first operational amplifier, for receiving a power indication signal and a feedback signal to generate the control signal; and the current clamp circuit comprises: a current sensor, for sensing the current of the main amplifier to generate a voltage representing the sensed current; a third operational amplifier, for receiving the voltage and a reference voltage to generate a compensation signal; and a control transistor, coupled to an output node of the first operational amplifier, for adjusting the control signal according to the compensation signal. 7. The amplifier system of claim 1 , further comprising: an impedance detector, for generating an output impedance of the main amplifier according to an amplitude of the output signal and the current of the main amplifier; wherein the controller generates the control signal to the gate electrode of the second transistor according to the output impedance of the main amplifier. 8. The amplifier system of claim 7 , wherein when the output impedance increases, the controller generates the control signal to the gate electrode of the second transistor to lower the gain of the main amplifier. 9. The amplifier system of claim 7 , wherein the controller comprises: an adjusting circuit, for receiving a power indication signal and adjusting the power indication signal according to the output impedance of the main amplifier; and a first operational amplifier, coupled to the adjusting circuit, for receiving the adjusted power indication signal and a feedback signal to generate the control signal. 10. A method for controlling a main amplifier, wherein the main amplifier comprises a first transistor and a second transistor coupled in cascode, the main amplifier receives an input signal and outputs an output signal, and the method comprises: generating a control signal according to the output signal and a current of the main amplifier, to control a gain of the main amplifier; sensing the current of the main amplifier; and adjusting the control signal according to the sensed current, to clamp the current of the main amplifier within a defined current range. 11. The method of claim 10 , further comprising: detecting an amplitude of the output signal; and adjusting the control signal according to the amplitude of the output signal, to clamp the output signal within a defined voltage range. 12. The method of claim 11 , wherein the step of generating the control signal comprises: using a first operational amplifier to receive a power indication signal and a feedback signal to generate the control signal; and the step of adjusting the control signal comprises: detecting the amplitude of the output signal; using a second operational amplifier to receive the amplitude of the output signal and a reference voltage to generate a compensation signal; and adjusting the control signal according to the compensation signal. 13. The method of claim 10 , wherein the step of generating the control signal comprises: using a first operational amplifier to receive a power indication signal and a feedback signal to generate the control signal; and the step of adjusting the control signal comprises: sensing the current of the main amplifier to generate a voltage representing the sensed current; using a third operational amplifier to receive the voltage and a reference voltage to generate a compensation signal; and adjusting the control signal according to the compensation signal. 14. The method of claim 10 , further comprising: generating an output impedance of the main amplifier according to an amplitude of the output signal and the current of the main amplifier; and the step of generating the control signal comprises: generating the control signal to the gate electrode of the second transistor according to the output impedance of the main amplifier. 15. The method of claim 14 , wherein the step of generating the control signal comprises: when the output impedance increases, generating the control signal to the gate electrode of the second transistor to lower the gain of the main amplifier. 16. The method of claim 14 , wherein the step of generating the control signal comprises: adjusting a power indication signal according to the output impedance of the main amplifier; and using a first operational amplifier to receive the adjusted power indication signal and a feedback signal to generate the control signal. 17. The amplifier system of claim 1 , wherein the main amplifier receives the input signal using the first transistor and outputs the output signal using the second transistor, and the controller generating the control signal to the second transistor to control the gain of the main amplifier. 18. The method of claim 10 , wherein the main amplifier receives the input signal using the first transistor and outputs the output signal using the second transistor, and the control signal is generated to the second transistor to control the gain of the main amplifier. 19. An amplifier system, comprising: a main amplifier comprising a first transistor and a second transistor coupled in cascode, wherein the main amplifier receives an input signal and outputs an output signal; a controller, coupled to the main amplifier, for generating a control signal according to the output signal and a current of the main amplifier, to control a gain of the m

Assignees

Inventors

Classifications

  • A voltage generating circuit being realised for biasing different circuit elements · CPC title

  • Feedback used to stabilise the amplifier · CPC title

  • A measuring circuit being coupled to the input of an amplifier · CPC title

  • A measuring circuit being coupled to the output of an amplifier · CPC title

  • the bias of the gate of a FET being controlled by a control signal · CPC title

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What does patent US10027300B2 cover?
The present invention provides a control circuit to stabilize an output power of a power amplifier. The control circuit comprises a voltage clamping loop, a current clamping loop and a loop for reducing power variation under VSWR, where the voltage clamping loop is used to clamp an output voltage of the power amplifier within a defined voltage range, the current clamping loop is used to clamp a…
Who is the assignee on this patent?
Mediatek Inc
What technology area does this patent fall under?
Primary CPC classification H03F3/193. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 17 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).