Fin structure of semiconductor device, manufacturing method thereof, and manufacturing method of active region of semiconductor device

Patent metadata

Field	Value
Publication number	US-10026843-B2
Application number	US-201514954661-A
Country	US
Kind code	B2
Filing date	Nov 30, 2015
Priority date	Nov 30, 2015
Publication date	Jul 17, 2018
Grant date	Jul 17, 2018

Abstract

A method for manufacturing an active region of a semiconductor device includes forming an implanted region in a substrate. The implanted region is adjacent to a top surface of the substrate. A clean treatment is performed on the top surface of the substrate. The top surface of the substrate is baked. An epitaxial layer is formed on the top surface of the substrate.

First claim

What is claimed is:

1. A fin structure of a semiconductor device comprising:
a substrate having an implanted region with a depth less than a depth of the substrate and a plurality of trenches therein, wherein the trenches define at least one bottom fin portion comprising at least a portion of the implanted region; and
an epitaxial fin portion disposed on a top surface of the bottom fin portion, wherein the implanted region of the substrate comprises oxygen and has an oxygen concentration lower than about 1.E+18 atoms/cm 3 .

2. The fin structure of claim 1 , wherein the implanted region comprises boron (B), phosphor (P), or a combination thereof.

3. The fin structure of claim 1 , further comprising:
an isolation structure disposed in at least one of the trenches.

4. The fin structure of claim 3 , wherein the epitaxial fin portion is higher than the isolation structure.

5. The fin structure of claim 3 , wherein the top surface of the bottom fin portion is lower than the isolation structure.

6. The fin structure of claim 1 , wherein the substrate is made of silicon.

7. The fin structure of claim 1 , wherein the epitaxial fin portion is made of silicon.

8. The fin structure of claim 3 , further comprising a liner layer disposed between the substrate and the isolation structure.

9. The fin structure of claim 8 , wherein the liner layer is in contact with the implanted region of the substrate.

10. The fin structure of claim 1 , wherein the epitaxial fin portion is in contact with the implanted region of the substrate.

11. A fin structure of a semiconductor device comprising
a substrate having at least one bottom fin portion thereon formed of an implanted region of the substrate, the implanted region having a depth less than a depth of the substrate;
an isolation structure surrounding the bottom fin portion; and
an epitaxial fin portion disposed on a top surface of the bottom fin portion, wherein an interface between the epitaxial fin portion and the bottom fin portion comprises oxygen and has an oxygen concentration lower than about 1.E+19 atoms/cm 3 .

12. The fin structure of claim 11 , wherein the bottom fin portion comprises boron (B), phosphor (P), or a combination thereof.

13. The fin structure of claim 11 , wherein the isolation structure is in a position lower than the epitaxy fin portion.

14. The fin structure of claim 11 , further comprising a liner layer disposed between the isolation structure and the substrate.

15. The fin structure of claim 11 , wherein a top surface of the isolation structure is in a position higher than the top surface of the bottom fin portion of the substrate.

16. The fin structure of claim 11 , wherein the substrate and the epitaxial fin portion are made of the same material.

17. A fin structure of a semiconductor device comprising
a substrate having a plurality of bottom fin portions thereon;
an isolation structure between the bottom fin portions; and
a plurality of epitaxial fin portions disposed on the bottom fin portions respectively, wherein the bottom fin portions are formed of an implanted region of the substrate, comprise oxygen, and have an oxygen concentration lower than about 1.E+18 atoms/cm 3 , the implanted region having a depth less than a depth of the substrate.

18. The fin structure of claim 17 , wherein a top surface of the isolation structure is in a position lower than top surfaces of the epitaxial fin portions.

19. The fin structure of claim 17 , wherein a top surface of the isolation structure is in a position higher than interfaces of the bottom fin portions and the epitaxial fin portions.

20. The fin structure of claim 17 , wherein the substrate and the epitaxial fin portions are made of silicon.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Lin Che-Yu
• Yu Ming-Hua
• Lee Tze-Liang
• Yang Chan-Lon

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P70/20

  Cleaning during device manufacture · CPC title

• H10P30/204

  into Group IV semiconductors · CPC title

• H10P30/21

  of electrically active species · CPC title

• H10W46/501

  for use before dicing · CPC title