Semiconductor device and manufacturing method thereof

US10026715B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10026715-B2
Application numberUS-201615064971-A
CountryUS
Kind codeB2
Filing dateMar 9, 2016
Priority dateMar 17, 2015
Publication dateJul 17, 2018
Grant dateJul 17, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device according to the present embodiment includes a semiconductor substrate, an insulating film and a conductive film. The insulating film is disposed on a first surface of the semiconductor substrate. The insulating film covers a semiconductor element. The conductive film penetrates the semiconductor substrate across from the first surface to a second surface opposite to the first surface. On the second surface, a trench continuously or intermittently exists across from a first end part side of the second surface to a second end part side thereof.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a semiconductor substrate; an insulating film disposed on a first surface of the semiconductor substrate, the insulating film covering a semiconductor element; and a conductive film penetrating the semiconductor substrate across from the first surface to a second surface opposite to the first surface, a trench across from a first end part side of the second surface to a second end part side thereof. 2. The semiconductor device according to claim 1 , wherein the trench exists in a continuous grid shape. 3. The semiconductor device according to claim 1 , wherein a plurality of the trenches exist intermittently, and at least one of the plurality of trenches exists in a cross shape. 4. The semiconductor device according to claim 1 , wherein the trench exists over a whole surface of the second surface. 5. The semiconductor device according to claim 1 , wherein at least part of the trench penetrates the semiconductor substrate across from the first surface to the second surface. 6. The semiconductor device according to claim 1 , wherein the trench contains a bottomed groove. 7. The semiconductor device according to claim 1 , comprising a reinforcing film disposed inside the trench. 8. The semiconductor device according to claim 1 , comprising a plurality of the semiconductor substrates facing one another, wherein the conductive films are arranged in the plurality of semiconductor substrates so as to oppose each other, the semiconductor device comprising a joint between the conductive films that oppose each other. 9. The semiconductor device according to claim 7 , wherein the reinforcing film comprises Ti, TiN, W, Al, Ni, Cu, SiO2, SiN or SiON. 10. The semiconductor device according to claim 8 , wherein the semiconductor substrate is a silicon substrate. 11. The semiconductor device according to claim 1 , wherein the conductive film is a Through-Silicon Via. 12. The semiconductor device according to claim 1 , wherein the conductive film is supplied inside a through hole, the through hole being formed on the substrate. 13. The semiconductor device according to claim 1 , wherein the conductive film comprises Ni. 14. The semiconductor device according to claim 1 , wherein the conductive film is electrically connected to the semiconductor element. 15. The semiconductor device according to claim 1 , further comprising: a bump on the semiconductor element, and wherein the conductive film is electrically connected to the semiconductor element on a first side of the semiconductor element, and a bump is electrically connected to the semiconductor element on a second side opposite to the first side of the semiconductor element.

Assignees

Inventors

Classifications

  • between stacked chips · CPC title

  • characterised by the through-semiconductor vias [TSVs] in the stacked chips · CPC title

  • the encapsulations exposing the passive side of the semiconductor body · CPC title

  • the substrate having spherical bumps for external connection · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

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What does patent US10026715B2 cover?
A semiconductor device according to the present embodiment includes a semiconductor substrate, an insulating film and a conductive film. The insulating film is disposed on a first surface of the semiconductor substrate. The insulating film covers a semiconductor element. The conductive film penetrates the semiconductor substrate across from the first surface to a second surface opposite to the …
Who is the assignee on this patent?
Toshiba Memory Corp
What technology area does this patent fall under?
Primary CPC classification H10W20/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 17 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).