Concurrent upgrade and backup of non-volatile memory

US10025508B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10025508-B2
Application numberUS-201514957180-A
CountryUS
Kind codeB2
Filing dateDec 2, 2015
Priority dateDec 2, 2015
Publication dateJul 17, 2018
Grant dateJul 17, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An endurance parameter value of a non-volatile memory included in a non-volatile dual in-line memory module (NVDIMM) can be monitored and compared against a warning threshold value. In response to the endurance parameter exceeding the warning threshold value, a system alert can be generated, within a host system of the NVDIMM, to inform a system user that the NVDIMM is approaching its end-of-life. If the endurance parameter exceeds a replacement threshold value greater than the warning threshold value, an upgrade process can be initiated. The upgrade process can include copying data from the first non-volatile memory to a volatile memory of the NVDIMM and copying, in response to the first non-volatile memory being replaced with a second non-volatile memory, the data from the volatile memory to the second non-volatile memory.

First claim

Opening claim text (preview).

What is claimed is: 1. A non-volatile dual in-line memory module (NVDIMM), the NVDIMM comprising: a volatile memory card including: a first connector on a first edge; a first socket on a second edge located opposite to the first edge; a light-emitting diode (LED); at least one volatile memory chip; and a memory controller chip configured to: monitor a count of program-erase (P/E) cycles applied to an at least one non-volatile memory chip; illuminate, in response to the count of P/E cycles being less than a warning threshold, the LED to a green color; illuminate, in response to the count of P/E cycles exceeding the warning threshold, the LED to a yellow color; and initiate, in response to the count of P/E cycles exceeding a replacement threshold greater than the warning threshold, a non-volatile memory card upgrade process that includes illuminating the LED to a red color; and a non-volatile memory card including: a second connector on a third edge; and the at least one non-volatile memory chip; wherein the second connector of the non-volatile memory card is configured to plug into the first socket of the volatile memory card and the first connector of the volatile memory card is configured to plug into a second socket mounted on a printed circuit board (PCB). 2. The NVDIMM of claim 1 , wherein the non-volatile memory card upgrade process further includes: copying data from the non-volatile memory card to the at least one volatile memory chip; and copying, in response to the non-volatile memory card being replaced with a secondary non-volatile memory card, data from the at least one volatile memory chip to the secondary non-volatile memory card. 3. The NVDIMM of claim 1 , wherein the endurance parameter value is a failure indicator of the at least one non-volatile memory chip. 4. The NVDIMM of claim 1 , wherein the warning threshold and the replacement threshold can be modified by a host system containing the NVDIMM. 5. The NVDIMM of claim 1 , wherein the host system includes a light pipe configured to transmit light from the LED to an exterior surface of the host system, the exterior surface being visible to a service technician.

Assignees

Inventors

Classifications

  • Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices · CPC title

  • Improving I/O performance · CPC title

  • Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles · CPC title

  • Supports for storage elements {, e.g. memory modules}; Mounting or fixing of storage elements on such supports · CPC title

  • Non-volatile semiconductor memory arrays · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10025508B2 cover?
An endurance parameter value of a non-volatile memory included in a non-volatile dual in-line memory module (NVDIMM) can be monitored and compared against a warning threshold value. In response to the endurance parameter exceeding the warning threshold value, a system alert can be generated, within a host system of the NVDIMM, to inform a system user that the NVDIMM is approaching its end-of-li…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F3/0616. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 17 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).