Leveraging non-volatile memory for persisting data

Patent metadata

Field	Value
Publication number	US-9535828-B1
Application number	US-201313872898-A
Country	US
Kind code	B1
Filing date	Apr 29, 2013
Priority date	Apr 29, 2013
Publication date	Jan 3, 2017
Grant date	Jan 3, 2017

Abstract

Data temporarily stored in volatile memory (e.g., RAM) on a host machine can be protected using a component such as an NV-DIMM, which includes components such as an ASIC, non-volatile memory, and a battery. If power is lost to the host, the battery provides the ASIC with the power needed to determine data in the volatile memory that is protected. This protected data then can be transferred to the non-volatile memory on the NV-DIMM. When power is restored, an application or other entity can contact the NV-DIMM to recover the data, which can be transferred over a sideband channel to be restored as appropriate for a prior operation. In at least some embodiments, the NV-DIMM can receive a key over the sideband channel that can be used to encrypt and decrypt the data for further security.

First claim

What is claimed is:

1. A system, comprising:
a processor;
volatile memory for temporarily storing data;
a power source for providing power to the processor and the volatile memory; and
a memory subsystem connected to the processor and the volatile memory by at least one communication bus, the memory subsystem configured to receive power from the power source and further including an application-specific integrated circuit (ASIC), non-volatile memory, and at least one battery, the ASIC configured to:
detect a loss of power from the power source, the loss of power preventing the processor from performing an operation with respect to the data temporarily stored in the volatile memory, the ASIC configured to receive power from the at least one battery in response to the loss of power from the power source;
determine at least one memory page stored in the volatile memory, the at least one memory page being determined at least in part by locating an entry in a protected page of the volatile memory, the protected page being mapped to the memory subsystem;
cause the content of the at least one memory page to be stored in the non-volatile memory on the memory subsystem; and
in response to power being restored from the power source, provide the content of the at least one memory page for access by an application over a sideband channel from the memory subsystem, the application enabled to perform one or more actions on at least a portion of the content of the at least one memory page.

2. The system of claim 1 , further comprising:
at least one persistent storage device, wherein the content of the at least one memory page corresponds to an operation to store the data to the at least one persistent storage device, and wherein the application accessing the content of the at least one memory page over the sideband channel is enabled to cause the processor to resume storing the content to the at least one persistent storage device.

3. The system of claim 1 , wherein the ASIC is further configured to:
store, using a key received over the sideband channel, the content of the at least one memory page as encrypted data in the non-volatile storage on the memory storage device.

4. The system of claim 3 , wherein the key is stored in volatile memory on the memory subsystem, and wherein the ASIC is further configured to:
receive another copy of the key upon power being restored by the power source, wherein the ASIC is capable of decrypting the content of the at least one memory page for access over the sideband channel.

5. A computer-implemented method of protecting data, comprising:
detecting a power failure event on a host machine, the host machine including volatile memory for temporarily storing data undergoing at least one operation on the host machine;
determining at least one memory page stored in the volatile memory of the host machine;
causing the content of the at least one memory page to be stored in non-volatile memory on a memory subsystem connected to the host machine, the memory subsystem powered by a secondary power source for enabling the content to be stored in the non-volatile memory after the power failure event; and
in response to a power restoration event, providing the content of the at least one memory page stored in the non-volatile memory for access by an application over a sideband channel from the memory subsystem, the application enabled to perform one or more actions on at least a portion of the content of the at least one memory page.

6. The computer-implemented method of claim 5 , further comprising:
mapping at least one memory page of the volatile memory to the non-volatile memory on the memory subsystem, at least a portion of the content of the at least one memory page being stored in the at least one memory page at a time of the power failure event.

7. The computer-implemented method of claim 5 , wherein the content of the at least one memory page includes information about an operation being performed using the content of the at least one memory page, wherein the application accessing the content of the at least one memory page stored in the non-volatile memory is able to determine the operation and cause the operation to resume after the power restoration event.

8. The computer-implemented method of claim 5 , wherein the memory subsystem is a non-volatile in-line memory module (NV-DIMM) and the secondary power source is a battery installed on the NV-DIMM, the NV-DIMM configured to be installed in a conventional memory slot on a motherboard of the host machine.

9. The computer-implemented method of claim 5 , further comprising:
storing the content of the at least one memory page in an encrypted form in the non-volatile memory on the memory subsystem.

10. The computer-implemented method of claim 9 , further comprising:
receiving, over the sideband channel, at least one key for encrypting the content of the at least one memory page, the at least one key being received from a keystore before the power failure event and after the power restoration event.

11. The computer-implemented method of claim 10 , further comprising:
storing the at least one key in volatile memory on the memory subsystem, wherein the key is not present on the memory subsystem after the power failure event.

12. The computer-implemented method of claim 5 , wherein the content of the at least one memory page is to be written to persistent storage, and further comprising:
notifying a requestor of the at least one operation that the at least one operation has been completed when the content of the at least one memory page has been at least one of written to persistent storage or stored as protected data in the volatile memory.

13. A memory card, comprising:
non-volatile memory;
a connector enabling the memory card to be connected to a connector of a host machine;
a sideband channel interface;
a secondary power source; and
circuitry connected to the non-volatile memory and configured to receive power from the secondary power source in response to a loss of power to the host machine, the circuitry configured to:
detect the loss of power to the host machine, the host machine including volatile memory for temporarily storing data undergoing at least one operation on the host machine;
determine at least one memory page temporarily stored in the volatile memory;
cause the content of the at least one memory page to be stored in the non-volatile memory on the memory subsystem;
receive, after a restoration of power to the host machine, a request from an application to retrieve the content of the at least one memory page stored in the non-volatile memory on the memory subsystem; and
transfer, to the application, the content of the at least one memory page over a sideband channel in response to the request, the application enabled to perform one or more actions on at least a portion of the content of the at least one memory page.

14. The memory card of claim 13 , wherein the content of the at least one memory page includes information about an operation being performed using the content of the at least one memory page, wherein the application accessing the content of the at least one memory page stored in the non-volatile memory is able to determine the operation and cause the operation to resume on the host machine after the restoration of power.

15. The memory card of claim 13 , wherein the circuitry is further configured to:
map at least one memory page of the volatile memory to the non-volatile memory on the memory card, at least a portion of the content of the at least one memory page being stored in the

Assignees

• Amazon Tech Inc

Inventors

• Mckelvie Samuel James
• Gupta Anurag Windlass

Classifications

• G06F12/0868

  Data transfer between cache memory and other subsystems, e.g. storage devices or host systems · CPC title

• G06F12/0246 Primary

  in block erasable memory, e.g. flash memory · CPC title

• G11C5/148

  Details of power up or power down circuits, standby circuits or recovery circuits · CPC title

• G11C11/4072

  Circuits for initialization, powering up or down, clearing memory or presetting · CPC title

• G06F9/4401

  Bootstrapping (security arrangements therefor G06F21/57) · CPC title