Hardware-efficient syndrome extraction for entangled quantum states
US-9762262-B2 · Sep 12, 2017 · US
Encoder, decoder, transmission device, and reception device
US10020821B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10020821-B2 |
| Application number | US-201415035548-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 13, 2014 |
| Priority date | Nov 15, 2013 |
| Publication date | Jul 10, 2018 |
| Grant date | Jul 10, 2018 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A transmission device and reception device for digital data that have excellent resistance to noise are provided. An encoder ( 11 - 1 ) of this disclosure, included in a transmission device ( 1 ) of this disclosure, applies LDPC encoding to digital data using a unique check matrix for each code rate by using a check matrix in which, taking a check matrix initial value table established in advance for each code rate at a code length of 44880 bits as initial values, 1 entries of a partial matrix corresponding to an information length appropriate for a code rate of 93/120 are allocated in the column direction over a cycle of 374 columns. A demodulator ( 23 ) of this disclosure, included in a reception device ( 2 ) of this disclosure, decodes digital data encoded by the encoder ( 11 - 1 ).
First claim
Opening claim text (preview).
The invention claimed is: 1. An encoder that applies LDPC encoding to digital data using a check matrix to generate an LDPC code, wherein the check matrix is adopted an LDGM structure and has a submatrix H A determined by a check matrix initial value table and a submatrix H B , the encoder comprising: a memory storing the check matrix initial value table which indicates positions of 1 entries of the submatrix H A ; and an LDPC encoder configured to read the check matrix initial value table from the memory and LDPC encoding by using the check matrix determined based on the check matrix initial value table, wherein a code length of the LDPC code is 44880 bits, a code rate of the LDPC code is 93/120, the submatrix H A has a dimension of 10098×34782 corresponding to an information bit sequence and has 1 entries in a column direction over a cycle of 374 columns, the submatrix H B has a dimension of 10098×10098 corresponding to parity bits and has a triangular structure, and 521 781 2081 2419 3589 5877 6085 6267 6657 1769 2029 2315 5799 6215 7255 7281 7385 9361 547 651 1873 2159 2471 7671 8581 8659 8919 2107 3069 3953 4851 5851 8555 9113 8815 9049 131 4935 5038 5565 6406 7515 7593 8074 7905 495 1821 2705 3095 3485 7459 8452 8503 8841 638 880 2073 2426 5014 6475 7307 8968 9179 27 910 2731 3199 4915 7923 8061 9543 9595 869 3081 3396 4109 6137 6345 7320 7880 8619 2226 1979 2178 4701 5331 6423 9738 9224 9491 2353 2937 4337 3458 4496 4375 4889 9532 9725 9138 1381 1809 1449 1535 4655 8303 8113 8269 4855 7552 6470 8936 7994 7002 9233 9174 9647 1991 6823 3584 6083 6115 5899 7302 7463 8529 2777 2603 2707 3615 3823 5123 6995 9153 573 1941 7936 7524 7112 7047 9023 9673 1892 1847 2689 7176 7661 8559 7801 9465 7764 7894 7957 3756 5481 8893 3403 7657 8373 3572 4670 4343 8924 7853 8217 4000 6095 9101 1743 6759 7541 1249 7827 9439 3312 5833 7177 3017 5985 5773 497 5080 9231 1301 5407 4837
Assignees
Inventors
Classifications
Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes · CPC title
Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing · CPC title
Arrangements at the receiver end · CPC title
- H03M13/036Primary
Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error · CPC title
Bose-Chaudhuri-Hocquenghem [BCH] codes · CPC title
Patent family
Related publications grouped by family.
External sources
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US10020821B2 cover?
- A transmission device and reception device for digital data that have excellent resistance to noise are provided. An encoder ( 11 - 1 ) of this disclosure, included in a transmission device ( 1 ) of this disclosure, applies LDPC encoding to digital data using a unique check matrix for each code rate by using a check matrix in which, taking a check matrix initial value table established in advan…
- Who is the assignee on this patent?
- Japan Broadcasting Corp
- What technology area does this patent fall under?
- Primary CPC classification H03M13/036. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jul 10 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).