Polymer via plugs with high thermal integrity

Patent metadata

Field	Value
Publication number	US-10020244-B2
Application number	US-201213431583-A
Country	US
Kind code	B2
Filing date	Mar 27, 2012
Priority date	Mar 27, 2012
Publication date	Jul 10, 2018
Grant date	Jul 10, 2018

Abstract

The present disclosure relates to providing via plugs in vias of a semiconductor material. The via plugs may be formed of a polymer, such as a polyimide, that can withstand subsequent soldering and operating temperatures. The via plugs effectively fill the vias to prevent the vias from being filled substantially with solder during a subsequent soldering processes.

First claim

What is claimed is:

1. A semiconductor device comprising:
a wide bandgap semiconductor material comprising a first metallization structure on a first surface and at least one via extending from a second surface of the semiconductor material that is opposite the first surface to the first metallization structure; and
a via plug provided within the at least one via, wherein the via plug is configured to prevent metal migration during operation of the semiconductor device.

2. The semiconductor device of claim 1 wherein the via plug is formed from a material that allows the via plug to retain its structural integrity up to at least 300 Celsius.

3. The semiconductor device of claim 1 wherein the via plug is formed from a material that allows the via plug to retain its structural integrity up to at least 380 Celsius.

4. The semiconductor device of claim 1 wherein the via plug is formed from a polymer.

5. The semiconductor device of claim 4 wherein the polymer is a cured polymer.

6. The semiconductor device of claim 5 wherein the cured polymer is a cured polyimide.

7. The semiconductor device of claim 5 wherein the via plug is formed from a material that allows the via plug to retain its structural integrity up to at least 300 Celsius.

8. The semiconductor device of claim 4 wherein the polymer is a solvent-free polymer.

9. The semiconductor device of claim 4 wherein the polymer is a solvent-free epoxy.

10. The semiconductor device of claim 4 wherein the polymer is a solvent-free thermoplastic.

11. The semiconductor device of claim 1 wherein the via plug is formed from a cured polyimide, which retains its structural integrity up to at least 300 Celsius.

12. The semiconductor device of claim 11 wherein the at least one via comprises at least one interior wall and further comprising a second metallization structure lining at least a portion of the at least one interior wall and a portion of the second surface of the semiconductor material.

13. The semiconductor device of claim 1 wherein the at least one via comprises at least one interior wall and further comprising a second metallization structure lining at least a portion of the at least one interior wall and a portion of the second surface of the semiconductor material.

14. The semiconductor device of claim 13 wherein the via plug has an exposed portion and further comprising an external barrier layer that covers the exposed portion of the via plug and at least a portion of the second metallization structure that resides over the portion of the second surface of the semiconductor material.

15. The semiconductor device of claim 14 wherein the via plug is substantially enclosed by the external barrier layer and a portion of the second metallization structure.

16. The semiconductor device of claim 14 wherein the external barrier layer comprises at least one of a group consisting of titanium, chrome, nickel chromium, and titanium tungsten.

17. The semiconductor device of claim 1 wherein the semiconductor device is formed on the semiconductor material.

18. The semiconductor device of claim 1 wherein the via plug is formed from a material that allows the via plug to retain its structural integrity at temperatures over about 380 Celsius.

Assignees

• Mieczkowski Van
• Hagleitner Helmut
• Pulz William T
• Cree Inc

Inventors

• Mieczkowski Van
• Hagleitner Helmut
• Pulz William T

Classifications

• H10W20/216

  characterised by dielectric material at least partially filling the via holes, e.g. covering the through-semiconductor vias in the via holes · CPC title

• H10W20/0242

  comprising etching via holes from the back sides of the chips, wafers or substrates · CPC title

• H10W20/0234

  comprising etching via holes that stop on pads or on electrodes · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/352

  comprising metals or metalloids, e.g. solders · CPC title