Semiconductor device having resistance elements and fabrication method thereof

US10014363B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10014363-B2
Application numberUS-201715402367-A
CountryUS
Kind codeB2
Filing dateJan 10, 2017
Priority dateFeb 19, 2016
Publication dateJul 3, 2018
Grant dateJul 3, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A semiconductor device includes as a resistance element a first polycrystalline silicon and a second polycrystalline silicon containing impurities, such as boron, of the same kind and having different widths. The first polycrystalline silicon contains the impurities at a concentration C X . The second polycrystalline silicon has a width larger than a width of the first polycrystalline silicon and contains the impurities of the same kind at a concentration C Y lower than the concentration C X . A sign of a temperature coefficient of resistance (TCR) of the first polycrystalline silicon changes at the concentration C X . A sign of a TCR of the second polycrystalline silicon changes at the concentration C Y .

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a first polycrystalline silicon containing first impurities at a first concentration and having a first width; and a second polycrystalline silicon containing the first impurities at a second concentration lower than the first concentration and having a second width larger than the first width, wherein: a sign of a temperature coefficient of the first polycrystalline silicon changes at the first concentration; a sign of a temperature coefficient of the second polycrystalline silicon changes at the second concentration; and the first polycrystalline silicon and the second polycrystalline silicon are formed as continuous one body and electrically connected. 2. The semiconductor device according to claim 1 , wherein the first concentration and the second concentration are higher than or equal to 1×10 20 cm −3 and lower than or equal to 1×10 21 cm −3 . 3. The semiconductor device according to claim 1 , wherein the first impurities are p-type impurities. 4. The semiconductor device according to claim 1 , wherein the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in series. 5. A semiconductor device comprising: a first polycrystalline silicon containing first impurities at a first concentration and having a first width; and a second polycrystalline silicon containing the first impurities at a second concentration lower than the first concentration and having a second width larger than the first width, wherein: a sign of a temperature coefficient of the first polycrystalline silicon changes at the first concentration; a sign of a temperature coefficient of the second polycrystalline silicon changes at the second concentration; and a first sheet resistance of the first polycrystalline silicon and a second sheet resistance of the second polycrystalline silicon are equal or almost equal. 6. The semiconductor device according to claim 5 , wherein the first concentration and the second concentration are higher than or equal to 1×10 20 cm −3 and lower than or equal to 1×10 21 cm −3 . 7. The semiconductor device according to claim 5 , wherein the first polycrystalline silicon and the second polycrystalline silicon are formed as continuous one body and electrically connected. 8. The semiconductor device according to claim 5 , wherein the first impurities are p-type impurities. 9. The semiconductor device according to claim 7 , wherein the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in series.

Assignees

Inventors

Classifications

  • H10D62/10Primary

    Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies · CPC title

  • Combinations of field-effect devices and resistors only · CPC title

  • Resistive arrangements (H10W44/20, H10W42/80 take precedence) · CPC title

  • H01L28/20Primary

    Electricity · mapped topic

  • Electricity · mapped topic

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10014363B2 cover?
A semiconductor device includes as a resistance element a first polycrystalline silicon and a second polycrystalline silicon containing impurities, such as boron, of the same kind and having different widths. The first polycrystalline silicon contains the impurities at a concentration C X . The second polycrystalline silicon has a width larger than a width of the first polycrystalline silicon a…
Who is the assignee on this patent?
Mie Fujitsu Semiconductor Ltd
What technology area does this patent fall under?
Primary CPC classification H10D62/10. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 03 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).