Liquid crystal display device, driving method of liquid crystal display device and electronic apparatus

Patent metadata

Field	Value
Publication number	US-10013932-B2
Application number	US-201715403893-A
Country	US
Kind code	B2
Filing date	Jan 11, 2017
Priority date	Mar 15, 2012
Publication date	Jul 3, 2018
Grant date	Jul 3, 2018

Abstract

A liquid crystal display device in which pixels having a memory function are arranged includes: a display drive unit performing display driving by a driving method for obtaining halftone gray scales by setting plural frames as one cycle and temporarily changing gray scales of respective pixels within one cycle; and a pixel drive unit supplying a voltage having the same phase as, or the reverse phase to, a common voltage the polarity of which is inverted in a given cycle and applied to counter electrodes of liquid crystal capacitors to pixel electrodes of the liquid crystal capacitors. The pixel drive unit supplies an intermediate voltage between high- and low-voltage sides of the common voltage to the pixel electrodes of the liquid crystal capacitors at the time of transition from the supply of the voltage having the same phase to the supply of the voltage having reverse phase.

First claim

The invention is claimed as follows:

1. A liquid crystal display device in which pixels having a memory function are arranged, comprising:
pixel electrodes constituting the pixels arranged in a matrix;
counter electrodes disposed opposed to the pixel electrodes, liquid crystal capacitors of the pixel being formed between the pixel electrodes and the counter electrodes; and
a display drive circuit configured to perform display driving by a driving method for obtaining halftone gray scales by setting frames as one cycle and temporarily changing gray scales of respective pixels within one cycle,
wherein a first signal, including a first voltage and a second voltage that is greater than the first voltage, is applied between the pixel electrodes and the counter electrodes,
wherein a polarity of the first signal is inverted between a positive polarity and a negative polarity by a polarity cycle period, and
wherein the first signal further includes a third voltage in a predetermined period when the first signal shifts from the first voltage to the second voltage, allowing the first signal to shift from the third voltage, to the second voltage, then to the first voltage in each of the polarity cycle periods of the positive polarity and the negative polarity.

2. The liquid crystal display device according to claim 1 ,
wherein the pixel drive circuit controls the first signal in accordance with an ambient temperature.

3. The liquid crystal display device according to claim 2 ,
wherein the pixel drive circuit controls, when the ambient temperature is higher than a predetermined temperature, the third voltage to have a voltage of one of the first voltage and the second voltage.

4. The liquid crystal display device according to claim 3 ,
wherein the pixel drive circuit adjusts a value of the third voltage in accordance with the ambient temperature.

5. The liquid crystal display device according to claim 3 ,
wherein the pixel drive circuit adjusts a period of supplying the third voltage in accordance with the ambient temperature.

6. A drive method to be used when driving a liquid crystal display device in which pixels having a memory function are arranged and which includes:
pixel electrodes constituting the pixels arranged in a matrix; and
counter electrodes disposed opposed to the pixel electrodes, liquid crystal capacitors of the pixel being formed between the pixel electrodes and the counter electrodes,
the drive method comprising:
performing display driving by a driving method for obtaining halftone gray scales by setting frames as one cycle and temporarily changing gray scales of respective pixels within one cycle, by a display drive circuit;
applying a common voltage signal to the counter electrodes; and
applying a first signal, including a first voltage and a second voltage that is greater than the first voltage, between the pixel electrodes and the counter electrodes,
wherein a polarity of the first signal is inverted between a positive polarity and a negative polarity by a polarity cycle period,
wherein the first signal further includes a third voltage in a predetermined period when the first signal shifts from the first voltage to the second voltage, allowing the first signal to shift from the third voltage, to the second voltage, then to the first voltage in each of the polarity cycle periods of the positive polarity and the negative polarity.

7. An electronic apparatus including a liquid crystal display device in which pixels having a memory function are arranged and which comprises:
pixel electrodes constituting the pixels arranged in a matrix;
counter electrodes disposed opposed to the pixel electrodes, liquid crystal capacitors of the pixel being formed between the pixel electrodes and the counter electrodes; and
a display drive circuit configured to perform display driving by a driving method for obtaining halftone gray scales by setting frames as one cycle and temporarily changing gray scales of respective pixels within one cycle,
wherein a first signal, including a first voltage and a second voltage that is greater than the first voltage, is applied between the pixel electrodes and the counter electrodes,
wherein a polarity of the first signal is inverted between a positive polarity and a negative polarity by a polarity cycle period,
wherein the first signal further includes a third voltage in a predetermined period when the first signal shifts from the first voltage to the second voltage, allowing the first signal to shift from the third voltage, to the second voltage, then to the first voltage in each of the polarity cycle periods of the positive polarity and the negative polarity.

Assignees

• Japan Display Inc

Inventors

• Teranishi Yasuyuki

Classifications

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2300/0857

  Static memory circuit, e.g. flip-flop · CPC title

• G09G3/207 Primary

  by domain size control (G09G3/3637 takes precedence) · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2300/0852

  being a dynamic memory with more than one capacitor · CPC title