Semiconductor integrated circuit

Patent metadata

Field	Value
Publication number	US-10008931-B2
Application number	US-201615257131-A
Country	US
Kind code	B2
Filing date	Sep 6, 2016
Priority date	Mar 11, 2016
Publication date	Jun 26, 2018
Grant date	Jun 26, 2018

Abstract

According to one embodiment, in a semiconductor integrated circuit, a first input terminal of an error amplifier is electrically connected to a third node between a second node and a reference potential. A second input terminal of the error amplifier is electrically connected to a reference voltage. An output terminal of the error amplifier is electrically connected to a gate of an output transistor. A first input terminal of a comparator is electrically connected to a fourth node between the second node and the reference potential. A second input terminal of the comparator is electrically connected to the reference voltage. One end of a coupling capacitance is electrically connected to an output terminal of the comparator. A gate of an auxiliary transistor is electrically connected to the other end of the coupling capacitance. A drain of the auxiliary transistor is electrically connected to the second node.

First claim

What is claimed is:

1. A semiconductor integrated circuit comprising:
an output transistor that is electrically connected between a first node on a side near a power source and a second node on a side near an output;
an error amplifier, a first input terminal of which is electrically connected to a third node, a second input terminal of which is electrically connected to a first reference voltage, and an output terminal of which is electrically connected to a gate of the output transistor, the third node being arranged between the second node and a reference potential, the third node having a first voltage which is based on a voltage of the second node;
a first comparing circuit, a first input terminal of which is electrically connected to a fourth node, and a second input terminal of which is electrically connected to the first reference voltage, the fourth node being arranged between the second node and the reference potential, the fourth node having a second voltage which is different from the first voltage and which is based on the voltage of the second node;
a first coupling capacitance, one end of which is electrically connected to an output terminal of the first comparing circuit; and
a first auxiliary transistor, a gate of which is electrically connected to the other end of the first coupling capacitance, and a drain of which is electrically connected to the second node.

2. The semiconductor integrated circuit according to claim 1 ,
wherein the second voltage is lower than the first voltage, and
wherein a source of the first auxiliary transistor is electrically connected to the reference potential.

3. The semiconductor integrated circuit according to claim 2 , further comprising:
a bias generation circuit that is electrically connected to a sixth node between the other end of the first coupling capacitance and the gate of the first auxiliary transistor.

4. The semiconductor integrated circuit according to claim 2 , further comprising:
a first resistive element, one end of which is electrically connected to a sixth node between the other end of the first coupling capacitance and the gate of the first auxiliary transistor, and another end of which is electrically connected to the reference potential; and
a second resistive element, one end of which is electrically connected to the sixth node, and another end of which is electrically to the first node.

5. The semiconductor integrated circuit according to claim 2 , further comprising:
a third auxiliary transistor, a gate of which is electrically connected to a drain, and a source of which is electrically connected to the reference potential; and
a fourth resistive element, one end of which is electrically connected to the drain of the third auxiliary transistor, and another end of which is electrically connected to a sixth node between the other end of the first coupling capacitance and the gate of the first auxiliary transistor.

6. The semiconductor integrated circuit according to claim 5 , further comprising:
a voltage follower, a first input terminal of which is electrically connected to a second reference voltage, and an output terminal of which is electrically connected to a second input terminal and the sixth node.

7. The semiconductor integrated circuit according to claim 2 , further comprising:
a fifth auxiliary transistor, a gate of which is supplied with a first signal to activate the first auxiliary transistor at an active level, and a drain of which is electrically connected to a sixth node between the other end of the first coupling capacitance and the gate of the first auxiliary transistor.

8. The semiconductor integrated circuit according to claim 1 ,
wherein the second voltage is higher than the first voltage, and
wherein a source of the first auxiliary transistor is electrically connected to the first node.

9. The semiconductor integrated circuit according to claim 8 , further comprising:
a second bias generation circuit that is electrically connected to a seventh node between the other end of the first coupling capacitance and the gate of the first auxiliary transistor.

10. The semiconductor integrated circuit according to claim 8 , further comprising:
a third resistive element, one end of which is electrically connected to a seventh node between the other end of the first coupling capacitance and the gate of the first auxiliary transistor, and another end of which is electrically connected to the first node; and
a second resistive element, one end of which is electrically connected to the reference potential, and another end of which is electrically connected to the seventh node.

11. The semiconductor integrated circuit according to claim 8 , further comprising:
a fourth auxiliary transistor, a gate of which is electrically connected to a drain, and a source of which is electrically connected to the first node; and
a fifth resistive element, one end of which is electrically connected to the drain of the fourth auxiliary transistor, and another end of which is electrically connected to a seventh node between the other end of the first coupling capacitance and the gate of the first auxiliary transistor.

12. The semiconductor integrated circuit according to claim 11 , further comprising:
a voltage follower, a first input terminal of which is electrically connected to a second reference voltage, and an output terminal of which is electrically connected to a second input terminal and the seventh node.

13. The semiconductor integrated circuit according to claim 8 , further comprising:
a sixth auxiliary transistor, a gate of which is supplied with a second signal to activate the first auxiliary transistor at an active level, and a drain of which is electrically connected to a seventh node between the other end of the first coupling capacitance and the gate of the first auxiliary transistor.

14. The semiconductor integrated circuit according to claim 1 ,
wherein the second voltage is lower than the first voltage, and
wherein a source of the first auxiliary transistor is electrically connected to the reference potential,
the semiconductor integrated circuit further comprising:
a second comparing circuit, a first input terminal of which is electrically connected to a fifth node, and a second input terminal of which is electrically connected to the first reference voltage, the fifth node being arranged between the second node and the third node, the fifth node having a third voltage which is higher than the first voltage and which is based on the voltage of the second node;
a second coupling capacitance, one end of which is electrically connected to an output terminal of the second comparing circuit; and
a second auxiliary transistor, a gate of which is electrically connected to the other end of the second coupling capacitance, and a drain of which is electrically connected to the second node, wherein
a source of the second auxiliary transistor is electrically connected to the first node.

15. The semiconductor integrated circuit according to claim 14 , further comprising:
a bias generation circuit that is electrically connected to a sixth node between the other end of the first coupling capacitance and the gate of the first auxiliary transistor; and
a second bias generation circuit that is electrically connected to a seventh node between the other end of the second coupling capacitance and the gate of the second auxiliary transistor.

16. The semiconductor integrated circuit according to claim 14 , further comprising:
a first resistive element, one end of which is electrically connected

Assignees

• Toshiba Memory Corp

Inventors

• Ideno Hiroyuki
• Kushibe Hidefumi

Classifications

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H03F3/34 Primary

  DC amplifiers in which all stages are DC-coupled (H03F3/45 takes precedence) · CPC title

• G05F1/575

  characterised by the feedback circuit · CPC title

• G05F1/565

  sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) · CPC title

• H03F2200/78

  A comparator being used in a controlling circuit of an amplifier · CPC title