Linear regulator having a closed loop frequency response based on a decoupling capacitance

US2016147239A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016147239-A1
Application numberUS-201414551923-A
CountryUS
Kind codeA1
Filing dateNov 24, 2014
Priority dateNov 24, 2014
Publication dateMay 26, 2016
Grant date

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  1. Title

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Abstract

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A method includes using a pass device of a linear regulator to provide an output signal to an output of the linear regulator in response to a signal that is received at a control terminal of the pass device. The method includes using the linear regulator to regulate the signal received at the control terminal based at least in part on the output signal; and controlling a closed loop frequency response of the linear regulator to cause a direct current (DC) gain of the linear regulator to extend to a frequency near or at frequency of a zero that is associated with a decoupling capacitor that is coupled to the output of the linear regulator.

First claim

Opening claim text (preview).

1 . A method comprising: using a pass device of a linear regulator to provide an output signal to an output of the linear regulator in response to a signal received at a control terminal of the pass device, wherein the pass device and the linear regulator are part of an integrated circuit (IC); using the linear regulator to regulate the signal received at the control terminal based at least in part on the output signal; and controlling a closed loop frequency response of the linear regulator to cause a direct current (DC) gain of the linear regulator to extend to a frequency near or at frequency of a zero associated with a decoupling capacitor external to the IC and coupled to the output of the linear regulator. 2 . The method of claim 1 , wherein controlling the closed loop frequency response comprises controlling the closed loop frequency response based at least in part on a product of the capacitance of the decoupling capacitor and an impedance of a switch used to selectively couple the pass device to the output. 3 . The method of claim 1 , wherein: using the linear regulator to regulate the signal comprises providing a feedback signal based at least in part on the output signal and using an amplifier of the linear regulator to provide a signal to the control terminal; and controlling the closed loop frequency response of the closed loop circuit comprises low pass filtering the feedback signal. 4 . The method of claim 3 , wherein using the amplifier comprises using a transconductance amplifier. 5 . The method of claim 1 , further comprising: detecting startup of the linear regulator; and in response to detection of the startup, coupling a current source to the output of the linear regulator. 6 . The method of claim 1 , wherein controlling the closed loop frequency response comprises controlling the closed loop frequency response to cause a combined frequency response of the linear regulator and a frequency response of a load coupled to the output of the linear regulator to have a single pole. 7 . A regulator comprising: an output; a pass device to provide an output signal for the output of the regulator in response to a signal received at a control terminal of the pass device; a closed loop circuit to regulate the signal received at the control terminal based at least in part on the output signal, the closed loop circuit comprising an error amplifier to regulate the signal received at the control terminal based at least in part on the output signal and a reference signal, the error amplifier comprising: a first amplifier stage comprising an output; and a second amplifier stage coupled to the output of the first amplifier stage and adapted to provide a bias current feedback to the first amplifier stage based at least in part on a current provided by the output of the regulator. 8 . The regulator of claim 7 , wherein the first amplifier stage comprises a differential voltage amplification stage. 9 . The regulator of claim 7 , wherein the second amplifier stage comprises a transconductance amplification stage. 10 . The regulator of claim 7 , wherein: the second amplifier stage forms a current mirror with the first amplifier stage to provide the bias current feedback to the first amplifier stage. 11 . The regulator of claim 7 , wherein: the output signal comprises an output voltage; the error amplifier comprises a voltage amplification stage, a transconductance amplification stage and a bias feedback path for the voltage amplification stage; the voltage amplification stage to provide a voltage in response to the output voltage and the reference signal; the transconductance amplification stage to regulate a current in the pass device in response to the voltage provided by the voltage amplification stage; and the bias feedback path to regulate a bias current of the voltage amplification stage in response to the current in the pass device. 12 . The regulator of claim 11 , further comprising a capacitor coupled to the bias feedback path. 13 . The regulator of claim 8 , further comprising: a current source; a comparator to compare the output signal to a threshold; and a controller to selectively configure the linear regulator to: use the closed loop circuit in a voltage regulation mode of the linear regulator to regulate an output voltage of the linear regulator; or use the current source in a current source mode of the linear regulator to regulate an output current of the linear regulator. 14 . An apparatus comprising: an integrated circuit comprising a linear regulator, the linear regulator comprising a closed loop circuit comprising a pass device, a feedback circuit, an amplifier and a filter; wherein the filter is adapted to control a first order roll off frequency of a frequency response of the closed loop circuit to cause the first order roll off frequency to be near or at frequency of a zero associated with a load coupled to the output. 15 . The apparatus of claim 14 , wherein the frequency of the zero is attributable to a capacitance of a decoupling capacitor and a resistance of a switch path that couples an output of the linear regulator to the decoupling capacitor. 16 . The apparatus of claim 14 , wherein: the linear regulator regulates an output voltage; the amplifier comprises a first transconductance amplification stage and a second transconductance amplification stage; the first transconductance amplification stage to provide a current in response to the output voltage and a reference signal; the filter to convert the current into a filtered voltage; and the second transconductance amplification stage to regulate a current in the pass device in response to the filtered voltage. 17 . The apparatus of claim 14 , wherein the pass device comprises a transistor comprising a current path having a current controlled in response to a signal received at a control terminal of the transistor. 18 . The apparatus of claim 14 , wherein the integrated circuit further comprises a processor core to receive power from the linear regulator. 19 . The apparatus of claim 14 , wherein the filter comprises a low pass filter. 20 . The apparatus of claim 14 , wherein the amplifier comprises a first amplification stage and a second amplification stage coupled to an output of the first amplification stage, and the filter is coupled to the output of the first amplification stage.

Assignees

Inventors

Classifications

  • with overcurrent detector · CPC title

  • using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

  • G05F1/575Primary

    characterised by the feedback circuit · CPC title

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What does patent US2016147239A1 cover?
A method includes using a pass device of a linear regulator to provide an output signal to an output of the linear regulator in response to a signal that is received at a control terminal of the pass device. The method includes using the linear regulator to regulate the signal received at the control terminal based at least in part on the output signal; and controlling a closed loop frequency r…
Who is the assignee on this patent?
Silicon Lab Inc
What technology area does this patent fall under?
Primary CPC classification G05F1/575. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu May 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).