Electronic device having Schottky diode

Patent metadata

Field	Value
Publication number	US-10008616-B2
Application number	US-201715465697-A
Country	US
Kind code	B2
Filing date	Mar 22, 2017
Priority date	Jun 28, 2016
Publication date	Jun 26, 2018
Grant date	Jun 26, 2018

Abstract

The electronic device having a Schottky diode includes first and second electrodes disposed on a semiconductor substrate and spaced apart from each other. A first semiconductor region is formed within the semiconductor substrate. The first semiconductor region may include a first surface portion in contact with the second electrode, forming a Schottky diode with the second electrode. A second semiconductor region having the same conductivity-type as the first semiconductor region and overlapping the first electrode is formed within the semiconductor substrate. A third semiconductor region having a different conductivity-type from the first semiconductor region, and having a first portion and a second portion spaced apart from each other, is formed within the semiconductor substrate. An isolation region is disposed between the second and the third semiconductor regions. The isolation region includes a first isolation portion and a second isolation portion spaced apart from each other.

First claim

What is claimed is:

1. An electronic device comprising:
a semiconductor substrate;
a first electrode and a second electrode disposed on the semiconductor substrate and spaced apart from each other;
a first semiconductor region formed within the semiconductor substrate, the first semiconductor region including a first surface portion in contact with the second electrode and forming a Schottky diode with the second electrode;
a second semiconductor region formed within the semiconductor substrate, having the same conductivity-type as that of the first semiconductor region, and vertically overlapping the first electrode; and
a third semiconductor region formed within the semiconductor substrate, having a different conductivity-type from that of the first semiconductor region, and vertically overlapping the second electrode; and
an isolation region between the second semiconductor region and the third semiconductor region,
wherein the isolation region includes a first isolation portion and a second isolation portion spaced apart from each other, when viewed in a plan view.

2. The electronic device of claim 1 , wherein the third semiconductor region includes a first portion and a second portion spaced apart from each other, and
wherein a region between the first portion and the second portion of the third semiconductor region is adjacent to a region between the first isolation portion and the second isolation portion.

3. The electronic device of claim 2 , further comprising:
a first upper impurity region disposed on the second semiconductor region and in contact with the first electrode; and
a second upper impurity region disposed on the third semiconductor region and in contact with the second electrode.

4. The electronic device of claim 3 , wherein the second upper impurity region is extended to the region between the first portion and the second portion of the third semiconductor region.

5. The electronic device of claim 1 , wherein the first semiconductor region further includes a second surface portion not vertically overlapping the first electrode or the second electrode and disposed between the first isolation portion and the second isolation portion.

6. The electronic device of claim 5 , further comprising:
an insulating pattern overlapping the second surface portion of the first semiconductor region.

7. The electronic device of claim 1 , wherein a region between the first isolation portion and the second isolation portion is disposed between the first electrode and the second electrode in a plan view.

8. The electronic device of claim 1 , further comprising:
a buried semiconductor region formed within the semiconductor substrate,
wherein the first semiconductor region is disposed on the buried semiconductor region.

9. The electronic device of claim 1 , further comprising:
a third electrode provided on the isolation region.

10. The electronic device of claim 1 , wherein the isolation region further includes a third isolation portion spaced apart from the first isolation portion and the second isolation portion.

11. An electronic device comprising:
a semiconductor substrate;
a first electrode and a second electrode provided on the semiconductor substrate;
a first semiconductor region in the semiconductor substrate, the first semiconductor region including a first surface portion in contact with the second electrode;
a second semiconductor region in the semiconductor substrate, the second semiconductor region having the same conductivity-type as that of the first semiconductor region and overlapping the first electrode;
a third semiconductor region in the semiconductor substrate, the third semiconductor region having a different conductivity-type from that of the first semiconductor region, overlapping the second electrode, and including portions spaced apart from each other; and
an isolation region between the second semiconductor region and the third semiconductor region.

12. The electronic device of claim 11 , wherein the isolation region includes isolation portions spaced apart from each other, when viewed in a plan view.

13. The electronic device of claim 12 , wherein a region between the portions spaced apart from each other of the third semiconductor region and a region between the isolation portions are adjacent to each other.

14. The electronic device of claim 11 , further comprising:
a first upper impurity region disposed on the second semiconductor region, in contact with the first electrode, having the same conductivity-type as that of the second semiconductor region, and having a higher impurity concentration than that of the second semiconductor region; and
a second upper impurity region disposed on the third semiconductor region, in contact with the second electrode, having the same conductivity-type as that of the third semiconductor region, and having a higher impurity concentration than that of the third semiconductor region.

15. The electronic device of claim 11 , wherein the first electrode surrounds the second electrode, and
wherein the isolation region is disposed between the first electrode and the second electrode in a plan view.

16. An electronic device comprising:
a semiconductor substrate;
a first electrode and a second electrode provided on the semiconductor substrate;
a first semiconductor region formed in the semiconductor substrate, the first semiconductor region including a first surface portion in contact with the second electrode to form a Schottky diode with the second electrode;
a second semiconductor region formed in the semiconductor substrate and vertically overlapping the first electrode;
a third semiconductor region formed in the semiconductor substrate and vertically overlapping the second electrode; and
an isolation region between the second semiconductor region and the third semiconductor region,
wherein the isolation region includes a first isolation portion and a second isolation portion spaced apart from one another when viewed in a plan view, and an isolation disconnection region between the first isolation portion and the second isolation portion, and
wherein the isolation disconnection region provides a current path between the first isolation portion and the second isolation portion.

17. The electronic device of claim 16 , wherein the third semiconductor region includes a first portion and a second portion spaced apart from each other, and
wherein a region between the first portion and the second portion of the third semiconductor region is adjacent to the isolation disconnection region.

18. The electronic device of claim 17 , further comprising:
a first upper impurity region disposed on the second semiconductor region and in contact with the first electrode; and
a second upper impurity region disposed on the third semiconductor region and in contact with the second electrode.

19. The electronic device of claim 18 , wherein the second upper impurity region is extended to the region between the first portion and the second portion of the third semiconductor region.

20. The electronic device of claim 16 , wherein the first semiconductor region further includes a second surface portion not vertically overlapping the first electrode or the second electrode and disposed between the first isolation portion and the second isolation portion.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Yong Don
• Pak Seo In

Classifications

• H01L27/0814

  Electricity · mapped topic

• H01L29/0649

  Electricity · mapped topic

• H01L29/872 Primary

  Electricity · mapped topic

• H10D8/60 Primary

  Schottky-barrier diodes · CPC title

• H10D84/617

  Combinations of vertical BJTs and only diodes · CPC title