Method for forming capacitor, semiconductor device, module, and electronic device

US10002866B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10002866-B2
Application numberUS-201615298306-A
CountryUS
Kind codeB2
Filing dateOct 20, 2016
Priority dateOct 30, 2015
Publication dateJun 19, 2018
Grant dateJun 19, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A transistor having a large amount of on-state current is provided. A semiconductor device including the transistor is provided. A semiconductor device with high integration is provided. A novel capacitor is provided. The capacitor includes a first conductor, a second conductor, and an insulator. The first conductor includes a region overlapping with the second conductor with the insulator provided therebetween. The first conductor includes tungsten and silicon. The insulator includes a silicon oxide film that is formed by oxidizing the first conductor.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for forming a transistor, comprising: forming a second insulator over a first insulator; forming a semiconductor over the second insulator; forming a first conductor over the semiconductor; etching a part of the first conductor by a first lithography method; etching parts of the first conductor, the semiconductor, and the second insulator by a second lithography method, so that the first conductor is divided into a second conductor and a third conductor; performing a plasma treatment containing oxygen on the second conductor and the third conductor, so that a silicon oxide film is formed on a side surface and a top surface of the second conductor, and a side surface and a top surface of the third conductor; forming a third insulator to cover a top surface of the silicon oxide film, a top surface of the first insulator, a side surface of the second insulator, and a side surface of the semiconductor; forming a fourth insulator over the third insulator; forming a fourth conductor over the fourth insulator; and etching a part of the fourth conductor by a third lithography method, wherein the first conductor includes tungsten and silicon. 2. The method for forming the transistor according to claim 1 , wherein the plasma treatment includes high-density plasma treatment. 3. A method for manufacturing a semiconductor device, wherein the semiconductor device comprises the transistor formed by the method according to claim 1 . 4. A method for manufacturing a module, wherein the module comprises: the semiconductor device manufactured by the method according to claim 3 ; and a printed circuit board. 5. A method for manufacturing an electronic device, wherein the electronic device comprises: the module manufactured by the method according to claim 4 ; and at least one of a speaker and an operation key. 6. The method for forming the transistor according to claim 1 , wherein the silicon oxide film is formed by oxidizing the second conductor and the third conductor. 7. The method for forming the transistor according to claim 1 , wherein the fourth conductor is overlapped with a channel formation region in the semiconductor. 8. A semiconductor device comprising: a second insulator over a first insulator; a semiconductor over the second insulator; a source electrode and a drain electrode over the semiconductor; a first silicon oxide film on a side surface and a top surface of the source electrode; a second silicon oxide film on a side surface and a top surface of the drain electrode; a third insulator in contact with a top surface of the first silicon oxide film, a top surface of the second silicon oxide film, a top surface of the first insulator, a side surface of the second insulator, and a side surface of the semiconductor; a fourth insulator over the third insulator; and a gate electrode over the fourth insulator, wherein each of the source electrode and the drain electrode includes tungsten and silicon. 9. A module comprising the semiconductor device according to claim 8 and a printed circuit board. 10. An electronic device comprising the module according to claim 9 and at least one of a speaker and an operation key. 11. The semiconductor device according to claim 8 , wherein the first silicon oxide film is formed by oxidizing the source electrode and the second silicon oxide film is formed by oxidizing the drain electrode.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • H01G4/008Primary

    Selection of materials · CPC title

  • structurally associated with non-printed electric components (H05K1/16 takes precedence) · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

Patent family

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Frequently asked questions

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What does patent US10002866B2 cover?
A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A transistor having a large amount of on-state current is provided. A semiconductor device including the transistor is provided. A semiconductor device with high integration is provided. A novel capacitor is provided. The capacitor inclu…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H01G4/008. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 19 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).