Cascaded dual-loop phase-locked loop (pll) for lowered phase noise with improved tuning range
US-2025337419-A1 · Oct 30, 2025 · US
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Yue Chik Patrick patents
Yue Chik Patrick is listed as an inventor on 9 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Yue Chik Patrick |
| Total patents | 9 |
| First publication | Mar 17, 2016 |
| Latest publication | Oct 30, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Phased-array transmitter based on intermediate-frequency local-oscillator (iflo) phase-shifting architecture
US-2025055498-A1 · Feb 13, 2025 · US
PAM-4 receiver with jitter compensation clock and data recovery
US-11757613-B2 · Sep 12, 2023 · US
Pam-4 receiver with jitter compensation clock and data recovery
US-2022385444-A1 · Dec 1, 2022 · US
Adaptive cascaded equalization circuits with configurable roll-up frequency response for spectrum compensation
US-9917707-B2 · Mar 13, 2018 · US
Power system-on-chip architecture
US-9560722-B2 · Jan 31, 2017 · US
Multi-functional smart led systems with visible light communication and ip-based radiofrequency connectivity
US-2016352422-A1 · Dec 1, 2016 · US
Power system-on-chip architecture
US-2016323968-A1 · Nov 3, 2016 · US
Adaptive cascaded equalization circuits with configurable roll-up frequency response for spectrum compensation
US-2016080177-A1 · Mar 17, 2016 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Univ Hong Kong Science & Tech | 7 |
| Univ Hong Kong Science & Techn | 1 |
| Univ Hong Kong Sci & Tech | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H03L7/0891 | 3 |
| H03L7/099 | 3 |
| H03L7/091 | 3 |
| H04L25/03019 | 2 |
| H04L25/03159 | 2 |