Systems and methods for performing multiplication of one or more matrices using multi-thread systolic arrays
US-12260248-B2 · Mar 25, 2025 · US
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Weiser Uri patents
Weiser Uri is listed as an inventor on 4 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Weiser Uri |
| Total patents | 4 |
| First publication | Dec 28, 2017 |
| Latest publication | Mar 25, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Multi-thread systolic array
US-2020192701-A1 · Jun 18, 2020 · US
Multi-multidimensional computer architecture for big data applications
US-10417005-B2 · Sep 17, 2019 · US
Multi-multidimensional computer architecture for big data applications
US-2017371676-A1 · Dec 28, 2017 · US
Recent patents
Latest publications not already listed above.
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Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Huawei Tech Co Ltd | 4 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F15/80 | 4 |
| G06F9/5027 | 2 |
| G06F9/3895 | 2 |
| G06F15/17 | 2 |
| G06F9/5083 | 2 |