Low power debug architecture for system-on-chips (SoCs) and systems
US-9753836-B2 · Sep 5, 2017 · US
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Trp Babu patents
Trp Babu is listed as an inventor on 4 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Trp Babu |
| Total patents | 4 |
| First publication | Mar 17, 2016 |
| Latest publication | Sep 5, 2017 |
Notable patents
Publications ranked by popularity score, then publication date.
Method, apparatus and system for dynamic bandwidth management in systems
US-9568547-B2 · Feb 14, 2017 · US
Method, apparatus and system for dynamic bandwidth management in systems
US-2016274187-A1 · Sep 22, 2016 · US
Low Power Debug Architecture For System-On-Chips (SoCs) And Systems
US-2016077905-A1 · Mar 17, 2016 · US
Recent patents
Latest publications not already listed above.
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Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 4 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F11/3648 | 4 |
| G06F11/348 | 2 |
| G06F11/3466 | 2 |
| G06F11/3476 | 2 |
| G01R31/31718 | 2 |