Decision feedback equalizer for double data rate memory
US-2026039514-A1 · Feb 5, 2026 · US
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Si Qiang patents
Si Qiang is listed as an inventor on 14 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Si Qiang |
| Total patents | 14 |
| First publication | Apr 16, 2015 |
| Latest publication | Feb 5, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Receiver circuit for double data rate memory, and the double data rate memory using the receiver circuit
US-2026038581-A1 · Feb 5, 2026 · US
Memory device having hardware regulation training
US-11049536-B2 · Jun 29, 2021 · US
Memory device having hardware regulation training
US-2021027818-A1 · Jan 28, 2021 · US
Processing system and method for data strobe signal
US-10629255-B2 · Apr 21, 2020 · US
Processing system and method for data strobe signal
US-2018197588-A1 · Jul 12, 2018 · US
Level-shift circuits compatible with multiple supply voltage
US-9948287-B2 · Apr 17, 2018 · US
Delay lock loop
US-9608642-B1 · Mar 28, 2017 · US
Delay lock loop
US-9608643-B1 · Mar 28, 2017 · US
Delay lock loop
US-9490822-B1 · Nov 8, 2016 · US
Recent patents
Latest publications not already listed above.
Delay lock loop
US-9484934-B1 · Nov 1, 2016 · US
Level-shift circuits compatible with multiple supply voltage
US-2016248415-A1 · Aug 25, 2016 · US
Level-shift circuits compatible with multiple supply voltage
US-9391619-B2 · Jul 12, 2016 · US
Level-shift circuits compatible with multiple supply voltage
US-2015102849-A1 · Apr 16, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Via Alliance Semiconductor Co Ltd | 10 |
| Shanghai Zhaoxin Semiconductor Co Ltd | 4 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H03K5/134 | 4 |
| H03L7/085 | 4 |
| H03K2005/00019 | 4 |
| G11C11/4076 | 4 |
| G11C7/1066 | 4 |