Software Runtime Assisted Co-Processing Acceleration with a Memory Hierarchy Augmented with Compute Elements
US-2025307180-A1 · Oct 2, 2025 · US
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Scrbak Marko patents
Scrbak Marko is listed as an inventor on 23 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Scrbak Marko |
| Total patents | 23 |
| First publication | Oct 28, 2021 |
| Latest publication | Oct 2, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Fine-Grained Memory Aware Cache Prefetch
US-2025245160-A1 · Jul 31, 2025 · US
Region pattern-matching hardware prefetcher
US-12360907-B2 · Jul 15, 2025 · US
Method and apparatus for managing a cache directory
US-12271318-B2 · Apr 8, 2025 · US
Apparatus, system, and method for throttling prefetchers to prevent training on irregular memory accesses
US-12153524-B2 · Nov 26, 2024 · US
Tag and data configuration for fine-grained cache memory
US-12099723-B2 · Sep 24, 2024 · US
Arbitrating atomic memory operations
US-12019566-B2 · Jun 25, 2024 · US
Apparatus, system, and method for throttling prefetchers to prevent training on irregular memory accesses
US-2024111676-A1 · Apr 4, 2024 · US
Tag and data configuration for fine-grained cache memory
US-2024111425-A1 · Apr 4, 2024 · US
Region pattern-matching hardware prefetcher
US-2024111677-A1 · Apr 4, 2024 · US
Recent patents
Latest publications not already listed above.
Method and apparatus for monitoring memory access traffic
US-11914517-B2 · Feb 27, 2024 · US
Re-fetching data for L3 cache data evictions into a last-level cache
US-11847062-B2 · Dec 19, 2023 · US
Performing Operations for Handling Data using Processor in Memory Circuitry in a High Bandwidth Memory
US-2023359556-A1 · Nov 9, 2023 · US
Method and apparatus for a dram cache tag prefetcher
US-11762777-B2 · Sep 19, 2023 · US
Filtering micro-operations for a micro-operation cache in a processor
US-11726783-B2 · Aug 15, 2023 · US
Re-fetching data for l3 cache data evictions into a last-level cache
US-2023195643-A1 · Jun 22, 2023 · US
Using error correction code (ECC) bits for retaining victim cache lines in a cache block in a cache memory
US-11681620-B2 · Jun 20, 2023 · US
Using Error Correction Code (ECC) Bits for Retaining Victim Cache Lines in a Cache Block in a Cache Memory
US-2023022320-A1 · Jan 26, 2023 · US
Method and apparatus for a dram cache tag prefetcher
US-2022318151-A1 · Oct 6, 2022 · US
Method and apparatus for managing a cache directory
US-2022206946-A1 · Jun 30, 2022 · US
Method and apparatus for monitoring memory access traffic
US-2022100668-A1 · Mar 31, 2022 · US
Arbitrating atomic memory operations
US-2022027291-A1 · Jan 27, 2022 · US
Filtering Micro-Operations for a Micro-Operation Cache in a Processor
US-2021334098-A1 · Oct 28, 2021 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Advanced Micro Devices Inc | 23 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F12/0862 | 7 |
| G06F2212/1016 | 7 |
| G06F2212/6024 | 7 |
| G06F2212/1024 | 6 |
| G06F2212/1008 | 6 |