Latent supplementary protocol for enhancing performance & functionality of communication systems
US-2025184205-A1 · Jun 5, 2025 · US
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Perry Golan patents
Perry Golan is listed as an inventor on 4 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Perry Golan |
| Total patents | 4 |
| First publication | Feb 7, 2019 |
| Latest publication | Jun 5, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Method to compensate for post-training insertion loss variation
US-2022014400-A1 · Jan 13, 2022 · US
On-chip jitter tolerance testing
US-10498469-B2 · Dec 3, 2019 · US
On-chip jitter tolerance testing
US-2019044627-A1 · Feb 7, 2019 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 4 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H04L43/50 | 2 |
| H04B1/16 | 2 |
| H04L43/087 | 2 |
| H04L43/0823 | 2 |
| H04B17/29 | 2 |