Method and apparatus for buffer management in load balancing
US-2024121194-A1 · Apr 11, 2024 · US
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Ma Te patents
Ma Te is listed as an inventor on 2 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Ma Te |
| Total patents | 2 |
| First publication | Feb 26, 2019 |
| Latest publication | Apr 11, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Technologies for a distributed hardware queue manager
US-10216668-B2 · Feb 26, 2019 · US
Recent patents
Latest publications not already listed above.
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Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H04L47/125 | 1 |
| H04L47/30 | 1 |
| H04L47/6255 | 1 |
| H04L49/90 | 1 |
| H04L49/9005 | 1 |