Built-in self-test device and error detection method
US-2025362343-A1 · Nov 27, 2025 · US
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Lin Lih-Wei patents
Lin Lih-Wei is listed as an inventor on 37 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Lin Lih-Wei |
| Total patents | 37 |
| First publication | Aug 18, 2016 |
| Latest publication | Nov 27, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Test device and testing method for memory device
US-12474405-B2 · Nov 18, 2025 · US
Test device and testing method for memory device
US-2025321270-A1 · Oct 16, 2025 · US
Memory array and memory cell
US-2025273264-A1 · Aug 28, 2025 · US
Testing circuit for testing electrical devices and device under test
US-2025216455-A1 · Jul 3, 2025 · US
Memory array and operation method thereof
US-11776636-B2 · Oct 3, 2023 · US
Memory array and operation method thereof
US-2023223089-A1 · Jul 13, 2023 · US
Resistive memory storage apparatus and operating method thereof
US-11437101-B2 · Sep 6, 2022 · US
Memory device and data writing method
US-11289160-B2 · Mar 29, 2022 · US
Memory storage device and data access method
US-11175988-B2 · Nov 16, 2021 · US
Recent patents
Latest publications not already listed above.
Resistive memory storage apparatus and operating method thereof
US-2021335421-A1 · Oct 28, 2021 · US
Memory storage device and data access method
US-2021303397-A1 · Sep 30, 2021 · US
Memory device and data writing method
US-2021210139-A1 · Jul 8, 2021 · US
Resistive memory apparatus and adjusting method for write-in voltage thereof
US-10978149-B1 · Apr 13, 2021 · US
Method for ripening resistive random access memory
US-10818353-B1 · Oct 27, 2020 · US
Resistive memory storage apparatus and writing method thereof including disturbance voltage
US-10783962-B2 · Sep 22, 2020 · US
Resistive memory apparatus and operating method thereof
US-10726890-B2 · Jul 28, 2020 · US
Operating method of resistive memory storage apparatus
US-10643698-B2 · May 5, 2020 · US
Memory-testing methods for testing memory having error-correcting code
US-10636507-B2 · Apr 28, 2020 · US
Operating method of resistive memory storage apparatus
US-2020027507-A1 · Jan 23, 2020 · US
Memory-testing methods for testing memory having error-correcting code
US-2019378586-A1 · Dec 12, 2019 · US
Operating method of resistive memory element
US-10490272-B2 · Nov 26, 2019 · US
Resistive memory storage apparatus and writing method thereof including disturbance voltage
US-10490275-B2 · Nov 26, 2019 · US
Detecting method for a resistive random access memory cell
US-10468100-B1 · Nov 5, 2019 · US
Physical unclonable function code generating method and providing apparatus thereof
US-10439829-B1 · Oct 8, 2019 · US
Method for obtaining optimal operating condition of resistive random access memory
US-10347336-B1 · Jul 9, 2019 · US
Resistive memory apparatus and operating method thereof
US-2019172535-A1 · Jun 6, 2019 · US
Operating method of resistive memory element
US-2019088321-A1 · Mar 21, 2019 · US
Resistive memory storage apparatus and writing method thereof
US-2019074059-A1 · Mar 7, 2019 · US
Resistive memory storage apparatus and writing method thereof
US-2019057738-A1 · Feb 21, 2019 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Winbond Electronics Corp | 37 |
| Windbond Electronics Corp | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G11C13/0069 | 27 |
| G11C13/004 | 22 |
| G11C2013/0083 | 20 |
| G11C13/0097 | 17 |
| G11C13/0064 | 17 |