Lookahead scheme for prioritized reads
US-9652371-B2 · May 16, 2017 · US
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Kannan Hari S patents
Kannan Hari S is listed as an inventor on 21 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Kannan Hari S |
| Total patents | 21 |
| First publication | Jan 22, 2015 |
| Latest publication | May 16, 2017 |
Notable patents
Publications ranked by popularity score, then publication date.
Least recently used mechanism for cache line eviction from a cache memory
US-9563575-B2 · Feb 7, 2017 · US
Selective cache way-group power down
US-9563567-B2 · Feb 7, 2017 · US
Completing load and store instructions in a weakly-ordered memory model
US-9535695-B2 · Jan 3, 2017 · US
Methods for cache line eviction
US-9529730-B2 · Dec 27, 2016 · US
Selective victimization in a multi-level cache hierarchy
US-9298620-B2 · Mar 29, 2016 · US
Least Recently Used Mechanism for Cache Line Eviction from a Cache Memory
US-2016055099-A1 · Feb 25, 2016 · US
Delaying cache data array updates
US-9229866-B2 · Jan 5, 2016 · US
Least recently used mechanism for cache line eviction from a cache memory
US-9176879-B2 · Nov 3, 2015 · US
Methods for cache line eviction
US-2015309944-A1 · Oct 29, 2015 · US
Recent patents
Latest publications not already listed above.
Selective cache way-group power down
US-2015309939-A1 · Oct 29, 2015 · US
Efficient handling of misaligned loads and stores
US-9131899-B2 · Sep 15, 2015 · US
Coordinated prefetching based on training in hierarchically cached processors
US-9098418-B2 · Aug 4, 2015 · US
Lookahead Scheme for Prioritized Reads
US-2015161033-A1 · Jun 11, 2015 · US
Prefetching across page boundaries in hierarchically cached processors
US-9047198-B2 · Jun 2, 2015 · US
Selective victimization in a multi-level cache hierarchy
US-2015149721-A1 · May 28, 2015 · US
Delaying cache data array updates
US-2015149722-A1 · May 28, 2015 · US
Access map-pattern match based prefetch unit for a processor
US-9015422-B2 · Apr 21, 2015 · US
Lookahead scheme for prioritized reads
US-9009369-B2 · Apr 14, 2015 · US
Least Recently Used Mechanism for Cache Line Eviction from a Cache Memory
US-2015026404-A1 · Jan 22, 2015 · US
Access Map-Pattern Match Based Prefetch Unit for a Processor
US-2015026413-A1 · Jan 22, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Apple Inc | 21 |
| Kannan Hari S | 3 |
| Kanapathipillai Pradeep | 2 |
| Lilly Brian P | 1 |
| Williams Iii Gerard R | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F12/0862 | 9 |
| G06F12/0811 | 6 |
| Y02D10/00 | 6 |
| G06F2212/1021 | 6 |
| G06F12/0897 | 5 |