Efficient execution of atomic instructions for single instruction, multiple thread (SIMT) architectures
US-12547413-B2 · Feb 10, 2026 · US
This page is not indexed by search engines while we improve data quality.
Johnson Daniel Robert patents
Johnson Daniel Robert is listed as an inventor on 23 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Johnson Daniel Robert |
| Total patents | 23 |
| First publication | Feb 26, 2015 |
| Latest publication | Feb 10, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
In situ ultrasonic flow meter validation
US-12480793-B2 · Nov 25, 2025 · US
Efficient execution of atomic instructions for single instruction, multiple thread (simt) architectures
US-2025291602-A1 · Sep 18, 2025 · US
Integrated flare combustion control
US-12305853-B2 · May 20, 2025 · US
Techniques for divergent thread group execution scheduling
US-11934867-B2 · Mar 19, 2024 · US
Convergence among concurrently executing threads
US-11847508-B2 · Dec 19, 2023 · US
Software-directed divergent branch target prioritization
US-2023115044-A1 · Apr 13, 2023 · US
Convergence among concurrently executing threads
US-2023038061-A1 · Feb 9, 2023 · US
Convergence among concurrently executing threads
US-11442795-B2 · Sep 13, 2022 · US
Techniques for divergent thread group execution scheduling
US-2022027194-A1 · Jan 27, 2022 · US
Recent patents
Latest publications not already listed above.
In situ ultrasonic flow meter validation
US-2022018695-A1 · Jan 20, 2022 · US
Integrated flare combustion control
US-2021071865-A1 · Mar 11, 2021 · US
Integrated flare combustion control
US-10746400-B2 · Aug 18, 2020 · US
Convergence among concurrently executing threads
US-2020081748-A1 · Mar 12, 2020 · US
Systems and methods for dynamic random access memory (DRAM) sub-channels
US-10468093-B2 · Nov 5, 2019 · US
Patch memory system
US-9934153-B2 · Apr 3, 2018 · US
Integrated flare combustion control
US-2017370579-A1 · Dec 28, 2017 · US
Systems and methods for dynamic random access memory (dram) sub-channels
US-2017255552-A1 · Sep 7, 2017 · US
Patch memory system
US-2017004089-A1 · Jan 5, 2017 · US
Cache utilization and eviction based on allocated priority tokens
US-9477526-B2 · Oct 25, 2016 · US
Apparatuses and risers for reacting feedstock in the presence of catalyst and methods for installing baffles in risers
US-9073030-B2 · Jul 7, 2015 · US
System, method, and computer program product for prioritized access for multithreaded processing
US-2015067691-A1 · Mar 5, 2015 · US
Apparatuses and risers for reacting feedstock in the presence of catalyst and methods for installing baffles in risers
US-2015056103-A1 · Feb 26, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Nvidia Corp | 15 |
| Gen Electric | 3 |
| Baker Hughes Holdings Llc | 3 |
| Uop Llc | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F9/4881 | 9 |
| G06F9/3888 | 9 |
| G06F9/522 | 6 |
| G06F9/3887 | 6 |
| G06F9/38873 | 6 |