Semiconductor package having lead frame with leads of different sizes and method of manufacture
US-2026011626-A1 · Jan 8, 2026 · US
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Halba Rohit patents
Halba Rohit is listed as an inventor on 7 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Halba Rohit |
| Total patents | 7 |
| First publication | Jun 27, 2019 |
| Latest publication | Jan 8, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
On-die decoupling capacitor area optimization
US-10621387-B2 · Apr 14, 2020 · US
Selection of die and package parasitic for IO power domain
US-10585999-B2 · Mar 10, 2020 · US
Probability-based optimization of system on chip (SOC) power
US-10560116-B2 · Feb 11, 2020 · US
On-die decoupling capacitor area optimization
US-2019370425-A1 · Dec 5, 2019 · US
Selection of die and package parasitic for io power domain
US-2019220562-A1 · Jul 18, 2019 · US
Probability-based optimization of soc power
US-2019199371-A1 · Jun 27, 2019 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Seagate Technology Llc | 6 |
| Nxp Bv | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F30/36 | 4 |
| G06F30/398 | 4 |
| G06F30/367 | 4 |
| G06F2119/06 | 4 |
| G06F17/5036 | 3 |