Systems, methods, and apparatuses for heterogeneous computing
US-2025123881-A1 · Apr 17, 2025 · US
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Fletcher Thomas D patents
Fletcher Thomas D is listed as an inventor on 31 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Fletcher Thomas D |
| Total patents | 31 |
| First publication | Apr 21, 2015 |
| Latest publication | Apr 17, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Systems, apparatuses, and methods for chained fused multiply add
US-2025060963-A1 · Feb 20, 2025 · US
Systems, methods, and apparatuses for heterogeneous computing
US-12135981-B2 · Nov 5, 2024 · US
Systems, apparatuses, and methods for chained fused multiply add
US-12073214-B2 · Aug 27, 2024 · US
Systems, methods, and apparatuses for heterogeneous computing
US-2023418655-A1 · Dec 28, 2023 · US
Systems, methods, and apparatuses for heterogeneous computing
US-11693691-B2 · Jul 4, 2023 · US
Systems, apparatuses, and methods for chained fused multiply add
US-2023083705-A1 · Mar 16, 2023 · US
Systems, apparatuses, and methods for chained fused multiply add
US-11487541-B2 · Nov 1, 2022 · US
Systems, methods, and apparatuses for heterogeneous computing
US-11416281-B2 · Aug 16, 2022 · US
Systems, methods, and apparatuses for heterogeneous computing
US-2022164218-A1 · May 26, 2022 · US
Recent patents
Latest publications not already listed above.
Systems, methods, and apparatuses for heterogeneous computing
US-11093277-B2 · Aug 17, 2021 · US
Systems, apparatuses, and methods for chained fused multiply add
US-2021081198-A1 · Mar 18, 2021 · US
Systems, methods, and apparatuses for heterogeneous computing
US-2020401440-A1 · Dec 24, 2020 · US
Systems, apparatuses, and methods for chained fused multiply add
US-10853065-B2 · Dec 1, 2020 · US
Systems, methods, and apparatuses for heterogeneous computing
US-2019347125-A1 · Nov 14, 2019 · US
Systems, apparatuses, and methods for chained fused multiply add
US-2019121637-A1 · Apr 25, 2019 · US
Systems, apparatuses, and methods for chained fused multiply add
US-10146535-B2 · Dec 4, 2018 · US
Vector mask driven clock gating for power efficiency of a processor
US-10133577-B2 · Nov 20, 2018 · US
Systems, apparatuses, and methods for chained fused multiply add
US-2018113708-A1 · Apr 26, 2018 · US
Super multiply add (super MADD) instructions with three scalar terms
US-9792115-B2 · Oct 17, 2017 · US
Instruction and logic to provide vector linear interpolation functionality
US-9766886-B2 · Sep 19, 2017 · US
Super multiply add (super madd) instruction
US-9733935-B2 · Aug 15, 2017 · US
Functional unit capable of executing approximations of functions
US-9639355-B2 · May 2, 2017 · US
Instruction and logic for multiplier selectors for merging math functions
US-9588765-B2 · Mar 7, 2017 · US
Math circuit for estimating a transcendental function
US-9465580-B2 · Oct 11, 2016 · US
Instruction and logic to provide vector linear interpolation functionality
US-2016266902-A1 · Sep 15, 2016 · US
Instruction and logic for multiplier selectors for merging math functions
US-2016092215-A1 · Mar 31, 2016 · US
Reducing power consumption in a fused multiply-add (FMA) unit responsive to input data values
US-9152382-B2 · Oct 6, 2015 · US
Method, apparatus, system for single-path floating-point rounding flow that supports generation of normals/denormals and associated status flags
US-9141586-B2 · Sep 22, 2015 · US
Vector mask driven clock gating for power efficiency of a processor
US-2015220345-A1 · Aug 6, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 31 |
| Fletcher Thomas D | 6 |
| Forsyth Andrew T | 3 |
| Corbal Jesus | 3 |
| Wu Lisa K | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F9/3001 | 28 |
| G06F9/30036 | 26 |
| G06F9/30038 | 24 |
| G06F9/30014 | 16 |
| G06F9/3836 | 14 |