Substrate architecture for solder joint reliabilty in microelectronic package structures and methods of forming the same
US-2019104610-A1 · Apr 4, 2019 · US
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De Bonis Thomas patents
De Bonis Thomas is listed as an inventor on 1 patent in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | De Bonis Thomas |
| Total patents | 1 |
| First publication | Apr 4, 2019 |
| Latest publication | Apr 4, 2019 |
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Major assignees
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| Assignee | Patents |
|---|---|
| Intel Corp | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W90/00 | 1 |
| H10W74/01 | 1 |
| H10W74/10 | 1 |
| H05K1/0256 | 1 |
| H05K3/0044 | 1 |