Via structure, memory array structure, three-dimensional resistance memory and method of forming the same
US-9257641-B2 · Feb 9, 2016 · US
Chen Wei-Su is listed as an inventor on 2 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Chen Wei-Su |
| Total patents | 2 |
| First publication | May 14, 2015 |
| Latest publication | Feb 9, 2016 |
Publications ranked by popularity score, then publication date.
Latest publications not already listed above.
No data yet.
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Ind Tech Res Inst | 2 |
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H01L45/146 | 2 |
| H01L45/1253 | 2 |
| H01L45/122 | 2 |
| H01L27/2481 | 2 |
| H10B63/845 | 2 |