Microservice latency reduction
US-12464054-B2 · Nov 4, 2025 · US
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Biederman Dan patents
Biederman Dan is listed as an inventor on 9 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Biederman Dan |
| Total patents | 9 |
| First publication | May 31, 2018 |
| Latest publication | Nov 4, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Technologies for accelerator interface
US-11687264-B2 · Jun 27, 2023 · US
Flexible packet processing
US-10848430-B2 · Nov 24, 2020 · US
Intelligent packet aggregation
US-10362149-B2 · Jul 23, 2019 · US
Flexible packet processing
US-2018191631-A1 · Jul 5, 2018 · US
Time-based flexible packet scheduling
US-2018191629-A1 · Jul 5, 2018 · US
Intelligent packet aggregation
US-2018191642-A1 · Jul 5, 2018 · US
Flexible packet scheduling
US-2018191632-A1 · Jul 5, 2018 · US
Technologies for remote accelerator interface
US-2018152317-A1 · May 31, 2018 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 8 |
| Intel Ip Corp | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H04L47/6275 | 6 |
| H04L69/22 | 6 |
| H04L49/9089 | 4 |
| H04L67/2842 | 3 |
| H04L67/568 | 3 |