Monitoring and control of reference clocks to reduce bit error ratio
US-9520965-B2 · Dec 13, 2016 · US
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Patent family 55066389
This patent family groups 2 related publications across US. Members often share priority claims or equivalent filings in different countries.
| Field | Value |
|---|---|
| Family ID | 55066389 |
| Family type | — |
| Earliest priority | Dec 31, 2014 |
| First filing country | US |
| Member publications | 2 |
| Countries | US |
| Representative publication | US9520965B2 — Monitoring and control of reference clocks to reduce bit error ratio |
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US9520965B2 — Monitoring and control of reference clocks to reduce bit error ratio (published Dec 13, 2016)
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