Flux, substrate and manufacturing method, and device
US-2024282737-A1 · Aug 22, 2024 · US
Bumps having a filler embedded in a matrix
Bumps having a filler embedded in a matrix · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10W72/225 |
| Official title | {Bumps having a filler embedded in a matrix} |
| Display label | Bumps having a filler embedded in a matrix |
| Total patents | 1,197 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 69 |
| 2016 | 85 |
| 2017 | 109 |
| 2018 | 127 |
| 2019 | 142 |
| 2020 | 171 |
| 2021 | 141 |
| 2022 | 127 |
| 2023 | 82 |
| 2024 | 68 |
| 2025 | 67 |
| 2026 | 9 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Chip arrangement and a method for manufacturing a chip arrangement
US-9224695-B2 · Dec 29, 2015 · US
Indirect printing bumping method for solder ball deposition
US-9216469-B2 · Dec 22, 2015 · US
Package structure and method of manufacturing the same
US-2015359096-A1 · Dec 10, 2015 · US
Technique for controlling positions of stacked dies
US-9209165-B2 · Dec 8, 2015 · US
Interconnect structure with redundant electrical connectors and associated systems and methods
US-2015348954-A1 · Dec 3, 2015 · US
Light emitting device package
US-2015349225-A1 · Dec 3, 2015 · US
Methods for forming semiconductor device packages
US-9202714-B2 · Dec 1, 2015 · US
Package structure and manufacturing method thereof
US-2015325762-A1 · Nov 12, 2015 · US
Conductive connections, structures with such connections, and methods of manufacture
US-2015325507-A1 · Nov 12, 2015 · US
Polymer Layers Embedded With Metal Pads for Heat Dissipation
US-2015311169-A1 · Oct 29, 2015 · US
Microelectronic package with stacked microelectronic units and method for manufacture thereof
US-9165911-B2 · Oct 20, 2015 · US
Method for bonding bare chip dies
US-2015294951-A1 · Oct 15, 2015 · US
Electronic device comprising at least a chip enclosed in a package and a corresponding assembly process
US-9159652-B2 · Oct 13, 2015 · US
Stacked semiconductor die assemblies with improved thermal performance and associated systems and methods
US-2015279828-A1 · Oct 1, 2015 · US
Electric circuit on flexible substrate
US-2015282341-A1 · Oct 1, 2015 · US
Batch process fabrication of package-on-package microelectronic assemblies
US-2015279823-A1 · Oct 1, 2015 · US
Die interconnect
US-2015279803-A1 · Oct 1, 2015 · US
Semiconductor packages and methods of forming the same
US-2015270232-A1 · Sep 24, 2015 · US
Magnetic contacts
US-9142475-B2 · Sep 22, 2015 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10W72/225?
- CPC H10W72/225 is the Cooperative Patent Classification code for “Bumps having a filler embedded in a matrix.”
- How many patents are filed under CPC H10W72/225 (Bumps having a filler embedded in a matrix)?
- Our database includes 1,197 publications tagged with this CPC code.
- Is patent activity under CPC H10W72/225 growing?
- Publication counts under this code: 68 in 2024 vs 67 in 2025 (latest complete years).