Single stack dual channel gate-all-around nanosheet with strained PFET and bottom dielectric isolation NFET
US-12568683-B2 · Mar 3, 2026 · US
wherein the stacked channels have different properties
wherein the stacked channels have different properties · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10D30/504 |
| Official title | {wherein the stacked channels have different properties} |
| Display label | wherein the stacked channels have different properties |
| Total patents | 60 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is rapidly growing.
| Year | Patents |
|---|---|
| 2015 | 4 |
| 2016 | 4 |
| 2017 | 6 |
| 2018 | 2 |
| 2019 | 2 |
| 2020 | 1 |
| 2021 | 3 |
| 2023 | 5 |
| 2024 | 6 |
| 2025 | 23 |
| 2026 | 4 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Integrated circuit devices and methods of forming the same
US-2026052765-A1 · Feb 19, 2026 · US
Thin film transistors for circuits for use in display devices
US-2026011312-A1 · Jan 8, 2026 · US
Silicon source and drain trench fill for wider contacts
US-2026006906-A1 · Jan 1, 2026 · US
Semiconductor device
US-2025374665-A1 · Dec 4, 2025 · US
Semiconductor device and methods of fabrication thereof
US-2025359132-A1 · Nov 20, 2025 · US
Gate all around field effect transistor having multiple gate stack structure and fabrication method therefor
US-2025294796-A1 · Sep 18, 2025 · US
Oxide transistor and method for manufacturing same
US-2025287665-A1 · Sep 11, 2025 · US
Method of manufacturing integrated circuit devices
US-2025261431-A1 · Aug 14, 2025 · US
Integrated circuit devices having enhanced power delivery networks therein
US-2025241060-A1 · Jul 24, 2025 · US
Integrated circuit device
US-2025234625-A1 · Jul 17, 2025 · US
Thin film transistors for circuits for use in display devices
US-12354557-B2 · Jul 8, 2025 · US
Structure and formation method of semiconductor device with semiconductor nanostructures
US-2025203903-A1 · Jun 19, 2025 · US
Semiconductor device
US-2025204004-A1 · Jun 19, 2025 · US
Semiconductor device including a field effect transistor and method of manufacturing the same
US-2025204003-A1 · Jun 19, 2025 · US
Semiconductor device and method of manufacturing semiconductor device
US-2025167141-A1 · May 22, 2025 · US
Semiconductor device
US-2025157942-A1 · May 15, 2025 · US
Thin film transistor and vertical non-volatile memory device including transition metal-induced polycrystalline metal oxide channel layer
US-2025151331-A1 · May 8, 2025 · US
Semiconductor device including dual contact structures on source/drain region
US-2025142871-A1 · May 1, 2025 · US
Semiconductor device and method of fabricating the same
US-2025126871-A1 · Apr 17, 2025 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10D30/504?
- CPC H10D30/504 is the Cooperative Patent Classification code for “wherein the stacked channels have different properties.”
- How many patents are filed under CPC H10D30/504 (wherein the stacked channels have different properties)?
- Our database includes 60 publications tagged with this CPC code.
- Is patent activity under CPC H10D30/504 growing?
- Publication counts under this code: 6 in 2024 vs 23 in 2025 (latest complete years).