Method and apparatus for vector permutation
US-2021349832-A1 · Nov 11, 2021 · US
Multiplying; Dividing {(G06F7/4833, G06F7/4836 take precedence)}
Multiplying; Dividing {(G06F7/4833, G06F7/4836 take precedence)} · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06F7/487 |
| Official title | Multiplying; Dividing {(G06F7/4833, G06F7/4836 take precedence)} |
| Display label | Multiplying; Dividing {(G06F7/4833, G06F7/4836 take precedence)} |
| Total patents | 187 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 1 |
| 2016 | 1 |
| 2017 | 9 |
| 2018 | 4 |
| 2019 | 15 |
| 2020 | 16 |
| 2021 | 19 |
| 2022 | 31 |
| 2023 | 35 |
| 2024 | 31 |
| 2025 | 14 |
| 2026 | 11 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Neural network computation apparatus having systolic array
US-2021319291-A1 · Oct 14, 2021 · US
Execution unit configured to evaluate functions using at least one multiplier circuit
US-11119733-B2 · Sep 14, 2021 · US
Method and apparatus for vector sorting
US-11106462-B2 · Aug 31, 2021 · US
Highly integrated scalable, flexible dsp megamodule architecture
US-2021240634-A1 · Aug 5, 2021 · US
Method and apparatus with floating point processing
US-2021200513-A1 · Jul 1, 2021 · US
Tracking streaming engine vector predicates to control processor execution
US-2021182210-A1 · Jun 17, 2021 · US
Apparatuses, methods, and systems for instructions to multiply values of zero
US-2021182057-A1 · Jun 17, 2021 · US
Highly integrated scalable, flexible DSP megamodule architecture
US-11036648-B2 · Jun 15, 2021 · US
Two address translations from a single table look-aside buffer read
US-2021149820-A1 · May 20, 2021 · US
Floating-point adder circuitry with subnormal support
US-11010131-B2 · May 18, 2021 · US
Reconfigurable Processor Circuit Architecture
US-2021073171-A1 · Mar 11, 2021 · US
Tracking streaming engine vector predicates to control processor execution
US-10936315-B2 · Mar 2, 2021 · US
Two address translations from a single table look-aside buffer read
US-10901913-B2 · Jan 26, 2021 · US
Multiplication-free approximation for neural networks and sparse coding
US-10867142-B2 · Dec 15, 2020 · US
Method and Apparatus for Sorting of Regions in a Vector
US-2020372099-A1 · Nov 26, 2020 · US
Method and Apparatus for Vector Sorting using Vector Permutation Logic
US-2020372098-A1 · Nov 26, 2020 · US
Method and Apparatus for Vector Based Finite Impulse Response (FIR) Filtering
US-2020373913-A1 · Nov 26, 2020 · US
Method and Apparatus for Dual Multiplication Units in a Data Path
US-2020371797-A1 · Nov 26, 2020 · US
Method and apparatus for vector sorting
US-2020371791-A1 · Nov 26, 2020 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G06F7/487?
- CPC G06F7/487 is the Cooperative Patent Classification code for “Multiplying; Dividing {(G06F7/4833, G06F7/4836 take precedence)}.”
- How many patents are filed under CPC G06F7/487 (Multiplying; Dividing {(G06F7/4833, G06F7/4836 take precedence)})?
- Our database includes 187 publications tagged with this CPC code.
- Is patent activity under CPC G06F7/487 growing?
- Publication counts under this code: 31 in 2024 vs 14 in 2025 (latest complete years).