Method for fabricating semiconductor device including a first ILD with sloped surface on a stacked structure and a second ILD on the first ILD
US-9780113-B2 · Oct 3, 2017 · US
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Choi Jongwan patents
Choi Jongwan holds 3 patents in our database, with recent filings and technology areas summarized below.
| Metric | Value |
|---|---|
| Total patents | 3 |
| Recent patents | 0 |
| First publication | Mar 5, 2015 |
| Latest publication | Oct 3, 2017 |
Filing trend
Year-over-year patent counts for this assignee.
Recent patents
Latest publications where this party is an assignee.
Notable patents
Representative or frequently cited publications from precomputed assignee stats.
Method for fabricating semiconductor device including a first ILD with sloped surface on a stacked structure and a second ILD on the first ILD
US-9780113-B2 · Oct 3, 2017 · US
Semiconductor devices having carbon-contained porous insulation over gate stack structures
US-9196630-B2 · Nov 24, 2015 · US
Semiconductor devices and methods of fabricating the same
US-2015060988-A1 · Mar 5, 2015 · US
Top CPC classifications
Most common classification codes in this portfolio.
| CPC | Patents |
|---|---|
| H01L27/11582 | 3 |
| H10B43/35 | 3 |
| H10B43/27 | 3 |
| H10W20/48 | 2 |
| H10W20/43 | 2 |
Technology areas
Mapped technology topics for this assignee.
| Technology | Patents |
|---|---|
| Electricity | 3 |