Method and apparatus for server platform architectures that enable serviceable nonvolatile memory modules
US-10331614-B2 · Jun 25, 2019 · US
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Wunderlich Russell J patents
Wunderlich Russell J holds 4 patents in our database, with recent filings and technology areas summarized below.
| Metric | Value |
|---|---|
| Total patents | 4 |
| Recent patents | 0 |
| First publication | May 7, 2015 |
| Latest publication | Jun 25, 2019 |
Filing trend
Year-over-year patent counts for this assignee.
Recent patents
Latest publications where this party is an assignee.
Test, validation, and debug architecture
US-10198333-B2 · Feb 5, 2019 · US
Initialization trace of a computing device
US-10146657-B2 · Dec 4, 2018 · US
Test, validation, and debug architecture
US-2015127983-A1 · May 7, 2015 · US
Notable patents
Representative or frequently cited publications from precomputed assignee stats.
Method and apparatus for server platform architectures that enable serviceable nonvolatile memory modules
US-10331614-B2 · Jun 25, 2019 · US
Test, validation, and debug architecture
US-10198333-B2 · Feb 5, 2019 · US
Initialization trace of a computing device
US-10146657-B2 · Dec 4, 2018 · US
Test, validation, and debug architecture
US-2015127983-A1 · May 7, 2015 · US
Technology areas
Mapped technology topics for this assignee.
| Technology | Patents |
|---|---|
| Physics | 4 |