Resistive memory write operation with merged reset
US-9520192-B2 · Dec 13, 2016 · US
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Lu Shih-Lien L patents
Lu Shih-Lien L holds 4 patents in our database, with recent filings and technology areas summarized below.
| Metric | Value |
|---|---|
| Total patents | 4 |
| Recent patents | 0 |
| First publication | Nov 17, 2015 |
| Latest publication | Dec 13, 2016 |
Filing trend
Year-over-year patent counts for this assignee.
Recent patents
Latest publications where this party is an assignee.
Instruction and logic for run-time evaluation of multiple prefetchers
US-9378021-B2 · Jun 28, 2016 · US
Number representation and memory system for arithmetic
US-9223544-B2 · Dec 29, 2015 · US
Sequential circuit with error detection
US-9189014-B2 · Nov 17, 2015 · US
Notable patents
Representative or frequently cited publications from precomputed assignee stats.
Resistive memory write operation with merged reset
US-9520192-B2 · Dec 13, 2016 · US
Instruction and logic for run-time evaluation of multiple prefetchers
US-9378021-B2 · Jun 28, 2016 · US
Number representation and memory system for arithmetic
US-9223544-B2 · Dec 29, 2015 · US
Sequential circuit with error detection
US-9189014-B2 · Nov 17, 2015 · US
Technology areas
Mapped technology topics for this assignee.
| Technology | Patents |
|---|---|
| Physics | 4 |
| Electricity | 1 |