Method for fabricating semiconductor device including a first ILD with sloped surface on a stacked structure and a second ILD on the first ILD
US-9780113-B2 · Oct 3, 2017 · US
Han Tae-Jong holds 2 patents in our database, with recent filings and technology areas summarized below.
| Metric | Value |
|---|---|
| Total patents | 2 |
| Recent patents | 0 |
| First publication | May 17, 2016 |
| Latest publication | Oct 3, 2017 |
Year-over-year patent counts for this assignee.
Latest publications where this party is an assignee.
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Mapped technology topics for this assignee.
| Technology | Patents |
|---|---|
| Electricity | 2 |