Non-volatile memory structure employing high-k gate dielectric and metal gate
US-9318336-B2 · Apr 19, 2016 · US
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Chudzik Michael P patents
Chudzik Michael P holds 7 patents in our database, with recent filings and technology areas summarized below.
| Metric | Value |
|---|---|
| Total patents | 7 |
| Recent patents | 0 |
| First publication | Jan 27, 2015 |
| Latest publication | Apr 19, 2016 |
Filing trend
Year-over-year patent counts for this assignee.
Recent patents
Latest publications where this party is an assignee.
High-K/metal gate stack using capping layer methods, IC and related transistors
US-9236314-B2 · Jan 12, 2016 · US
Method of manufacturing scaled equivalent oxide thickness gate stacks in semiconductor devices and related design structure
US-9099461-B2 · Aug 4, 2015 · US
Method and structure to reduce FET threshold voltage shift due to oxygen diffusion
US-9093495-B2 · Jul 28, 2015 · US
Oxygen scavenging spacer for a gate electrode
US-9059211-B2 · Jun 16, 2015 · US
Notable patents
Representative or frequently cited publications from precomputed assignee stats.
Non-volatile memory structure employing high-k gate dielectric and metal gate
US-9318336-B2 · Apr 19, 2016 · US
High-K/metal gate stack using capping layer methods, IC and related transistors
US-9236314-B2 · Jan 12, 2016 · US
Method of manufacturing scaled equivalent oxide thickness gate stacks in semiconductor devices and related design structure
US-9099461-B2 · Aug 4, 2015 · US
Method and structure to reduce FET threshold voltage shift due to oxygen diffusion
US-9093495-B2 · Jul 28, 2015 · US
Oxygen scavenging spacer for a gate electrode
US-9059211-B2 · Jun 16, 2015 · US
Top CPC classifications
Most common classification codes in this portfolio.
| CPC | Patents |
|---|---|
| H10D64/691 | 4 |
| H10D84/038 | 4 |
| H01L29/517 | 4 |
| H10D64/685 | 3 |
| H01L29/513 | 3 |
Technology areas
Mapped technology topics for this assignee.
| Technology | Patents |
|---|---|
| Electricity | 7 |