Selective insertion of clock mismatch compensation symbols in signal transmissions based on a receiver's compensation capability
US-9213355-B2 · Dec 15, 2015 · US
USRE46782E · US · E1
| Field | Value |
|---|---|
| Publication number | US-RE46782-E |
| Application number | US-201414480075-A |
| Country | US |
| Kind code | E1 |
| Filing date | Sep 8, 2014 |
| Priority date | Dec 21, 2006 |
| Publication date | Apr 10, 2018 |
| Grant date | Apr 10, 2018 |
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Controlling a power supply which supplies a voltage to target circuit of an integrated circuit. An adjustable delay line powered by the supply voltage is co-located on the IC with the target circuit. The adjustable delay line is subjected to substantially the same operating conditions as the target circuit. A control unit measures a delay time of the adjustable delay line. Based on the measured delay time, the control unit outputs a control signal by which the power supply adjusts the supply voltage. The adjustable delay line comprises multiple distinct delay elements, each with delay properties and responsivity to changes in operating conditions. Each delay element emulates delay properties of physical elements (e.g., gates and wires) in the target circuit. In this manner, power consumption may be reduced, while still maintaining proper operation of the target circuit.
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What is claimed is: 1. A closed-loop voltage controller for controlling a supply voltage of a power supply which supplies a voltage to target circuit of an integrated circuit (IC), the closed-loop voltage controller comprising: an adjustable delay line powered by the supply voltage and co-located on the IC with the target circuit, the adjustable delay line subjected to substantially the same operating conditions as the target circuit; and a control unit to measure a delay time of the adjustable delay line, and, based on the measured delay time, to output a control signal instructing the power supply to adjust the supply voltage; wherein the adjustable delay line comprises multiple distinct delay elements, each with delay properties and responsivity to changes in operating conditions, wherein the delay elements emulate delay properties of physical elements in the target circuit; wherein the delay elements are connected in series and arranged in segments, each segment including delay elements having delay times, wherein a delay element of a segment and another delay element of another segment have different delay times, and wherein the number of delay elements in each delay line segment is selectable, and wherein the delay segments comprise: a first segment of standard threshold voltage (SVT) gate delay elements; a second segment of high threshold voltage (HVT) gate delay elements; and a third segment of wire delay elements. 2. The closed-loop voltage controller of claim 1 , wherein the target circuit includes interconnected gates and each distinct delay element is constructed to emulate the delay properties of the gates and wires of the target circuit. 3. The closed-loop voltage controller of claim 1 , wherein the control unit lowers the supply voltage if the measured delay time through the adjustable delay line is shorter than a lowest time in a predetermined time range, and raises the supply voltage if the measured delay time is longer than a longest time in the predetermined time range. 4. The closed-loop voltage controller of claim 1 , wherein the power supply comprises an Inter-Integrated Circuit (I2C) interface slave, the power supply receives control signals via the I2C interface slave, and the power supply adjusts the supply voltage based on control signals received via the I2C interface slave. 5. The closed-loop voltage controller of claim 4 , wherein the control unit outputs the control signal to an I2C interface master, and the I2C interface master forwards the control signal to the I2C interface slave of the power supply. 6. The closed-loop voltage controller of claim 4 , wherein the I2C interface slave of the power supply receives control signals from other voltage controllers using the I2C protocol. 7. The closed-loop voltage controller of claim 6 , wherein the I2C interface slave of the power supply receives control signals from a DVM based power manager using the I2C protocol. 8. A closed-loop voltage controller for controlling a supply voltage of a power supply which supplies a voltage to target circuit of an integrated circuit (IC), the closed-loop voltage controller comprising: an adjustable delay line powered by the supply voltage and co-located on the IC with the target circuit, the adjustable delay line subjected to substantially the same operating conditions as the target circuit; and a control unit to measure a delay time of the adjustable delay line, and, based on the measured delay time, to output a control signal instructing the power supply to adjust the supply voltage; wherein the adjustable delay line comprises multiple distinct delay elements, each with delay properties and responsivity to changes in operating conditions, wherein the delay elements emulate delay properties of physical elements in the target circuit; wherein the delay elements are connected in series and arranged in segments, each segment including delay elements having delay times, wherein a delay element of a segment and another delay element of another segment have different delay times, and wherein the number of delay elements in each delay line segment is selectable; wherein the delay segments comprise: a first segment of standard threshold voltage (SVT) gate delay elements; a second segment of high threshold voltage (HVT) gate delay elements; and a third segment of wire delay elements. 9. The closed-loop voltage controller of claim 8 , wherein the adjustable delay line is configured to emulate a critical path of the target circuit. 10. The closed loop voltage controller of claim 9 , wherein the adjustable delay line is configured such that a quantity of distinct delay elements used in the adjustable delay line is proportional to the quantity of distinct physical elements in the critical path. 11. The closed-loop voltage controller of claim 9 , wherein the critical path to emulate is chosen based on a Dynamic Voltage Management (DVM) power management system. 12. The closed-loop voltage controller of claim 9 , wherein the control unit measures the delay time based on a plurality of delay line measurements. 13. The closed-loop voltage controller of claim 12 , wherein the plurality of delay line measurements are compared to a predetermined time. 14. The closed-loop voltage controller of claim 13 , wherein the delay time is longer or shorter than the predetermined time. 15. The closed-loop voltage controller of claim 14 , wherein the delay time of the adjustable delay line is adjusted for each measurement to indicate how much the delay time differs from the predetermined time, and wherein the delay time is adjusted without changing proportions of distinct delay elements used in the adjustable delay line. 16. A method for controlling a supply voltage of a power supply which supplies a voltage to a target circuit of an integrated circuit (IC), the method comprising: providing the supply voltage to an adjustable delay line co-located on the IC with the target circuit, wherein the adjustable delay line is subjected to substantially the same operating conditions as the target circuit; measuring a delay time of the adjustable delay line; and outputting a control signal, based on the measured delay time, instructing the power supply to adjust the supply voltage; wherein the adjustable delay line comprises multiple distinct delay elements, each with delay properties and responsivity to changes in operating conditions, wherein the delay elements emulate delay properties of physical elements in the target circuit; wherein the delay elements are connected in series and arranged in segments, each segment including delay elements having delay times, wherein a number of delay elements in each delay line segment is selectable; wherein a delay element of a segment and another delay element of another segment have different delay times; and wherein the delay segments comprise: a first segment of standard threshold voltage (SVT) gate delay elements; a second segment of high threshold voltage (HVT) gate delay elements; and a third segment of wire delay elements. 17. The method of claim 16 , wherein the target circuit includes interconnected gates and each distinct delay element is constructed to emulate the delay properties of the gates and wires of the target circuit. 18. The method of claim 16 , further comprising configuring the adjustable delay line to emulate a critical path of the target circuit. 19. The method of claim 18 , wherein the adjustable delay line is configured such that a quantity of distinct delay elements used i
Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00 (architectures of general purpose stored program computers G06F15/76) · CPC title
Power supply means, e.g. regulation thereof (for memories G11C) · CPC title
Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals · CPC title
Generating or distributing clock signals or signals derived directly therefrom · CPC title
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