Selective memory cell program and erase

Patent metadata

Field	Value
Publication number	US-RE45754-E
Application number	US-201414226276-A
Country	US
Kind code	E1
Filing date	Mar 26, 2014
Priority date	Aug 19, 2009
Publication date	Oct 13, 2015
Grant date	Oct 13, 2015

Abstract

Techniques are disclosed herein for programming memory arrays to achieve high program/erase cycle endurance. In some aspects, only selected word lines (WL) are programmed with other WLs remaining unprogrammed. As an example, only the even word lines are programmed with the odd WLs left unprogrammed. After all of the even word lines are programmed and the data block is to be programmed with new data, the block is erased. Later, only the odd word lines are programmed. The data may be transferred to a block that stores multiple bit per memory cell prior to the erase. In one aspect, the data is programmed in a checkerboard pattern with some memory cells programmed and others left unprogrammed. Later, after erasing the data, the previously unprogrammed part of the checkerboard pattern is programmed with remaining cells unprogrammed.

First claim

What is claimed is:

1. A method of operating non-volatile storage having a plurality of non-volatile storage elements and a plurality of word lines associated with the plurality of non-volatile storage elements, the method comprising:
erasing the plurality of non-volatile storage elements;
programming data in a first group of the plurality of non-volatile storage elements while leaving unprogrammed a second group of the plurality of non-volatile storage elements, for every non-v…

Assignees

• Sandisk Technologies Inc

Inventors

• Dong Yingda
• Kuo Tien-Chien
• Hemink Gerrit Jan

Classifications

• G11C16/30

  Physics · mapped topic

• G11C16/10

  Physics · mapped topic

• G11C11/5642

  Physics · mapped topic

• G11C11/5628 Primary

  Physics · mapped topic

• G11C16/16

  Physics · mapped topic