System, method and memory device providing data scrambling compatible with on-chip copy operation

USRE45697E · US · E1

Patent metadata
FieldValue
Publication numberUS-RE45697-E
Application numberUS-201414242610-A
CountryUS
Kind codeE1
Filing dateApr 1, 2014
Priority dateDec 31, 2007
Publication dateSep 29, 2015
Grant dateSep 29, 2015

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  5. First independent claim

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Abstract

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Data scrambling techniques implemented externally to a flash memory device are disclosed which can be used in concert with flash memory on-chip copy functionality operating internally to the flash device, thus supporting high performance copying operations. All the data stored in the flash may be scrambled, including headers and control structures. Robust file system operation may be achieved, including the capability to tolerate a power loss at any time, and yet be able to relocate data internally within the flash without having to de-scramble and then re-scramble the data. An exemplary hardware based solution has little or no impact on overall system performance, and may be implemented at very low incremental cost to increase overall system reliability. The data scrambling technique preferably uses a logical address, such as logical block address or logical page address, rather than a physical address, to determine a seed scrambling key.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for storing information in a non-volatile memory, said method comprising: determining a starting key based upon a seed key and a logical page address associated with a group of data; randomizing the group of data using a deterministic sequence of keys corresponding to the starting key; storing the randomized group of data into a physical page of the non-volatile memory; and storing, into the physical page of the non-volatile memory, additional…

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What does patent USRE45697E cover?
Data scrambling techniques implemented externally to a flash memory device are disclosed which can be used in concert with flash memory on-chip copy functionality operating internally to the flash device, thus supporting high performance copying operations. All the data stored in the flash may be scrambled, including headers and control structures. Robust file system operation may be achieved, …
Who is the assignee on this patent?
Sandisk Technologies Inc
What technology area does this patent fall under?
Primary CPC classification G06F12/0246. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 29 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (E1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).