Lithography system and projection method

USRE45552E · US · E1

Patent metadata
FieldValue
Publication numberUS-RE45552-E
Application numberUS-201213689665-A
CountryUS
Kind codeE1
Filing dateNov 29, 2012
Priority dateMar 10, 2006
Publication dateJun 9, 2015
Grant dateJun 9, 2015

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present invention relates a probe forming lithography system for generating a pattern on to a target surface such as a wafer, using a black and white writing strategy, i.e. writing or not writing a grid cell, thereby dividing said pattern over a grid comprising grid cells, said pattern comprising features of a size larger than that of a grid cell, in each of which cells said probe is switched “on” or “off, wherein a probe on said target covers a significantly larger surface area than a grid cell, and wherein within a feature a position dependent distribution of black and white writings is effected within the range of the probe size as well as to a method upon which such system may be based.

First claim

Opening claim text (preview).

The invention claimed is: 1. Method of operating a writing beam probe forming lithography system for projecting a pattern on to a target surface, comprising: using an “on” and “off” writing strategy to operate said writing beam probe based on dividing said pattern over a grid comprising grid cells, wherein said pattern includes features having a size larger than that of each one of said grid cells, in each of said grid cells, switching said writing beam probe “on” or “off”, wher…

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What does patent USRE45552E cover?
The present invention relates a probe forming lithography system for generating a pattern on to a target surface such as a wafer, using a black and white writing strategy, i.e. writing or not writing a grid cell, thereby dividing said pattern over a grid comprising grid cells, said pattern comprising features of a size larger than that of a grid cell, in each of which cells said probe is switch…
Who is the assignee on this patent?
Mapper Lithography Ip Bv
What technology area does this patent fall under?
Primary CPC classification H01J37/3177. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 09 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (E1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).