Method of writing data to a memory

Patent metadata

Field	Value
Publication number	US-RE45366-E
Application number	US-201313792843-A
Country	US
Kind code	E1
Filing date	Mar 11, 2013
Priority date	Jul 21, 2003
Publication date	Feb 10, 2015
Grant date	Feb 10, 2015

Abstract

The present invention relates to a synchronous semiconductor memory device with double data rate, and more particularly, to a synchronous semiconductor memory device for inputting and outputting data using a free-running clock and inserting a preamble indicative of start of data into the outputted data. A semiconductor memory device of the present invention receives a data read command from the exterior of the memory device in response to a predetermined clock signal inputted from the exterior, and outputting data including a preamble in response to the clock signal.

First claim

What is claimed is:

1. A semiconductor memory device comprising:
a memory cell for storing data; an internal clock generator for generating a first internal clock signal, a second internal clock signal or a third internal clock signal in response to a mode control signal; a command/address input unit for transferring an externally input command/address signal to inside of the semiconductor memory device in synchronization with the first internal clock signal; a controller fo…

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kyung Kye-Hyun

Classifications

• G11C7/1078

  Physics · mapped topic

• G11C7/1066 Primary

  Physics · mapped topic

• G11C7/1051

  Physics · mapped topic

• G11C7/1093

  Physics · mapped topic

• G11C11/4093

  Physics · mapped topic