Network tap with battery-assisted and programmable failover

Patent metadata

Field	Value
Publication number	US-9998213-B2
Application number	US-201615355013-A
Country	US
Kind code	B2
Filing date	Nov 17, 2016
Priority date	Jul 29, 2016
Publication date	Jun 12, 2018
Grant date	Jun 12, 2018

Abstract

A network tap with battery assisted and programmable failover is disclosed. The network tap includes a processing element, at least one optical-electrical transceiver, and at least one multiplexer/demultiplexer module. A backup battery provides power to the optical-electrical transceiver(s) and the multiplexer/demultiplexer module(s) but not the processing element when operating in a failover mode. The network tap is programmable to operate in a fail open mode in which traffic received from the network passes through the network tap during failover or a fail closed mode in which traffic receive from the network is blocked during failover.

First claim

What is claimed is:

1. A network tap comprising:
a processing element;
at least one optical-electrical transceiver for receiving an optical signal from a network and for converting the optical signal into an electrical signal;
at least one multiplexer/demultiplexer module coupled to the at least one optical-electrical transceiver for operating in a first mode when the network tap is externally powered, wherein, when operating in the first mode, the at least one multiplexer/demultiplexer module provides the electrical signal to the processing element, which performs a network monitoring task for the electrical signal, wherein the at least one multiplexer/demultiplexer module is configured to operate in a second mode comprising a fail open mode when the network tap is not externally powered wherein, when operating in the second mode, the at least one multiplexer/demultiplexer module ceases providing the electrical signal to the processing element and implements a loopback operation for the electrical signal, wherein the at least one multiplexer/demultiplexer module comprises a multiplexer/demultiplexer module located on a single chip and wherein implementing the loopback operation includes looping the electrical signal from an input port of the multiplexer/demultiplexer module to an output port of the multiplexer/demultiplexer module; and
a power source internal to the network tap for providing temporary power to optical-electrical transceiver and the multiplexer/demultiplexer module for operating in the second mode.

2. The network tap of claim 1 the at least one optical-electrical transceiver comprises at least one small form factor pluggable (SFP) transceiver.

3. The network tap of claim 2 wherein the at least one SFP transceiver comprises at least one SFP+ transceiver.

4. A network tap comprising:
a processing element;
at least one optical-electrical transceiver for receiving an optical signal from a network and for converting the optical signal into an electrical signal;
at least one multiplexer/demultiplexer module coupled to the at least one optical-electrical transceiver for operating in a first mode when the network tap is externally powered, wherein, when operating in the first mode, the at least one multiplexer/demultiplexer module provides the electrical signal to the processing element, which performs a network monitoring task for the electrical signal, wherein the at least one multiplexer/demultiplexer module is configured to operate in a second mode comprising a fail open mode when the network tap is not externally powered wherein, when operating in the second mode, the at least one multiplexer/demultiplexer module ceases providing the electrical signal to the processing element and implements a loopback operation for the electrical signal, wherein the at least one multiplexer/demultiplexer module comprises a first multiplexer/demultiplexer module located on a first chip and a second multiplexer/demultiplexer module located on a second chip separate from the first chip, and wherein implementing the loopback operation includes looping the electrical signal from the first multiplexer/demultiplexer module to the second multiplexer/demultiplexer module.

5. The network tap of claim 1 wherein the power source does not power the processing element.

6. The network tap of claim 1 wherein the processing element monitors network traffic carried by the electrical signal.

7. The network tap of claim 1 wherein the power source comprises a battery.

8. The network tap of claim 1 wherein the optical signal comprises a ten gigabit Ethernet signal.

9. The network tap of claim 1 wherein the at least one multiplexer/demultiplexer module is programmable to operate in the second mode or in a third mode when the network tap is not externally powered, wherein operating in the third mode includes a fail closed mode in which the at least one multiplexer/demultiplexer module blocks traffic to or from the network from flowing through the network tap.

10. A network tap comprising:
a processing element;
at least one optical-electrical transceiver for receiving an optical signal from a network and for converting the optical signal into an electrical signal;
at least one multiplexer/demultiplexer module coupled to the at least one optical-electrical transceiver for operating in a first mode when the network tap is externally powered, wherein, when operating in the first mode, the at least one multiplexer/demultiplexer module provides the electrical signal to the processing element, which performs a network monitoring task for the electrical signal; and
a multiplexer/demultiplexer controller coupled to the at least one multiplexer/demultiplexer module, wherein the multiplexer/demultiplexer controller is programmable to control the at least one multiplexer/demultiplexer module to operate in a second mode comprising a fail open mode or a third mode comprising a fail closed mode when the network tap is not externally powered wherein, when operating in the second mode, the at least one multiplexer/demultiplexer module ceases providing the electrical signal to the processing element and implements a loopback operation for the electrical signal and wherein, when operating in the third mode, the at least one multiplexer/demultiplexer module blocks traffic to or from the network from flowing through the network tap, wherein the at least one multiplexer/demultiplexer module comprises a multiplexer/demultiplexer module located on a single chip and wherein implementing the loopback operation comprises looping the electrical signal from an input port of the multiplexer/demultiplexer module to an output port of the multiplexer/demultiplexer module.

11. The network tap of claim 10 the at least one optical-electrical transceiver comprises at least one small form factor pluggable (SFP) transceiver.

12. The network tap of claim 11 wherein the at least one SFP transceiver comprises at least one SFP+ transceiver.

13. A network tap comprising:
a processing element;
at least one optical-electrical transceiver for receiving an optical signal from a network and for converting the optical signal into an electrical signal;
at least one multiplexer/demultiplexer module coupled to the at least one optical-electrical transceiver for operating in a first mode when the network tap is externally powered, wherein, when operating in the first mode, the at least one multiplexer/demultiplexer module provides the electrical signal to the processing element, which performs a network monitoring task for the electrical signal; and
a multiplexer/demultiplexer controller coupled to the at least one multiplexer/demultiplexer module, wherein the multiplexer/demultiplexer controller is programmable to control the at least one multiplexer/demultiplexer module to operate in a second mode comprising a fail open mode or a third mode comprising a fail closed mode when the network tap is not externally powered wherein, when operating in the second mode, the at least one multiplexer/demultiplexer module ceases providing the electrical signal to the processing element and implements a loopback operation for the electrical signal and wherein, when operating in the third mode, the at least one multiplexer/demultiplexer module blocks traffic to or from the network from flowing through the network tap, wherein the at least one multiplexer/demultiplexer module comprises a first multiplexer/demultiplexer module located on a first chip and a second multiplexer/demultiplexer module located on a second chip separate from the first chip and wherein implementing the loopback operation comprises looping the electrical signal from the

Assignees

• Ixia
• Keysight Tech Singapore Holdings Pte Ltd

Inventors

• Fung Randy
• Desdier Marcel Felix
• Le Ky Hong

Classifications

• H04B10/25891

  Transmission components (H04B10/40 takes precedence) · CPC title

• H04Q11/0071

  Provisions for the electrical-optical layer interface · CPC title

• H04B10/032 Primary

  using working and protection systems {(H04J14/0287 takes precedence)} · CPC title

• H04Q2011/0081

  Fault tolerance; Redundancy; Recovery; Reconfigurability · CPC title

• H04Q2213/13217

  Cranckback in routing, trombone connection, loopback circuit · CPC title